Intel Core Duo Processor and Intel Core Solo Processor on 65 nm Process

Errata
Specification Update 23
AE12. FP Inexact-Result Exception Flag May Not Be Set
Problem: When the result of a floating-point operation is not exactly representable in the
destination format (1/3 in binary form, for example), an inexact-result (precision)
exception occurs. When this occurs, the PE bit (bit 5 of the FPU status word) is
normally set by the processor. Under certain rare conditions, this bit may not be set
when this rounding occurs. However, other actions taken by the processor (invoking
the software exception handler if the exception is unmasked) are not affected. This
erratum can only occur if the floating-point operation which causes the precision
exception is immediately followed by one of the following instructions:
 FST m32real
 FST m64real
 FSTP m32real
 FSTP m64real
 FSTP m80real
 FIST m16int
 FIST m32int
 FISTP m16int
 FISTP m32int
 FISTP m64int
Note: Even if this combination of instructions is encountered, there is also a dependency on
the internal pipelining and execution state of both instructions in the processor.
Implication: Inexact-result exceptions are commonly masked or ignored by applications, as it
happens frequently, and produces a rounded result acceptable to most applications.
The PE bit of the FPU status word may not always be set upon receiving an inexact-
result exception. Thus, if these exceptions are unmasked, a floating-point error
exception handler may not recognize that a precision exception occurred. Note that
this is a “sticky” bit, i.e., once set by an inexact-result condition, it remains set until
cleared by software.
Workaround: This condition can be avoided by inserting two NOP instructions between the two
floating-point instructions.
Status: For the steppings affected, see the Summary Tables of Changes.
AE13. A Locked Data Access That Spans across Two Pages May Cause the
System to Hang
Problem: An instruction with lock data access that spans across two pages may, given some
rare internal conditions, hang the system.
Implication: When this erratum occurs, the system may hang. Intel has not observed this erratum
with any commercially-available software or system.
Workaround: A locked data access should always be aligned.
Status: For the steppings affected, see the Summary Tables of Changes.