Intel Core Duo Processor and Intel Core Solo Processor on 65 nm Process

Errata
22 Specification Update
AE9. LTR Instruction May Result in Unexpected Behavior
Problem: Under certain circumstances an LTR (Load Task Register) instruction may result in an
unexpected behavior if all the following conditions are met:
Invalid data selector of the TR (Task Register) resulting with either #GP (General
Protection Fault) or #NP (Segment Not Present Fault).
GDT (Global Descriptor Table) is not 8-bytes aligned.
Implication: If all conditions have been met then under certain circumstances LTR instruction may
result in system hang, memory corruption or other unexpected behavior. This erratum
has not been observed in commercial operating systems or software.
Workaround: Operating system software should align GDT to 8-bytes, as recommended in the IA-32
Intel
®
Architecture Software Developer's Manual, section titled Segment Descriptor
Tables. For performance reasons, GDT is typically aligned to 8-bytes.
Status: For the steppings affected, see the Summary Tables of Changes.
AE10. Invalid Entries in Page-Directory-Pointer-Table Register (PDPTR) May
Cause General Protection (#GP) Exception If the Reserved Bits Are
Set to One
Problem: Invalid entries in the Page-Directory-Pointer-Table Register (PDPTR) that have the
reserved bits set to one may cause a General Protection (#GP) exception.
Implication: Intel has not observed this erratum with any commercially-available software.
Workaround: Do not set the reserved bits to one when PDPTR entries are invalid.
Status: For the steppings affected, see the Summary Tables of Changes.
AE11. VMCALL When Executed during VMX Root Operation While CPL > 0
May Not Generate #GP Fault
Problem: If VMCALL is executed during VMX root operation with CPL > 0, the expected behavior
is for the processor to generate a General Protection Fault (#GP). Due to this erratum,
the #GP fault may not be generated.
Implication: VM Monitor code running with CPL > 0 may not generate #GP fault on VMCALL, but
still will behave as if VM Exit had occurred.
Workaround: None Identified.
Status: For the steppings affected, see the Summary Tables of Changes.