Intel Core Duo Processor and Intel Core Solo Processor on 65 nm Process

Identification Information

16 Specification Update

Identification Information

Component Identification via Programming Interface

The Intel

Core™ Duo processor and Intel

Core™ Solo processor on 65 nm process

can be identified by the following register contents:

Family

Model

0110

1110

1. The family corresponds to bit [11:8] of the EDX register after RESET, bits [11:8] of the

EAX register after the CPUID instruction is executed with a 1 in the EAX register, and

the generation field of the Device ID register accessible through Boundary Scan.

2. The family corresponds to bit [7:4] of the EDX register after RESET, bits [7:4] of the

EAX register after the CPUID instruction is executed with a 1 in the EAX register, and

the generation field of the Device ID register accessible through Boundary Scan.

Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX, and EDX

registers after the CPUID instruction is executed with a 2 in the EAX register. Refer to

the Intel

Processor Identification and the CPUID Instruction Application Note (AP-

485) for further information on the CPUID instruction.

Component Marking Information

Figure 1. Intel

Core™ Duo Processor and Intel

Core™ Solo Processor on 65 nm

Process (Micro-FCPGA/FCBGA) S-Spec Markings