Datasheet
Table Of Contents

Datasheet 1
1Introduction..............................................................................................................7
1.1 Terminology .......................................................................................................8
1.2 References .........................................................................................................9
2 Low Power Features ................................................................................................ 11
2.1 Clock Control and Low Power States .................................................................... 11
2.1.1 Core Low-Power States ........................................................................... 12
2.1.1.1 C0 State .................................................................................. 12
2.1.1.2 C1/AutoHALT Powerdown State .................................................. 12
2.1.1.3 C1/MWAIT Powerdown State ...................................................... 13
2.1.1.4 Core C2 State........................................................................... 13
2.1.1.5 Core C3 State........................................................................... 13
2.1.1.6 Core C4 State........................................................................... 13
2.1.2 Package Low-Power States ...................................................................... 13
2.1.2.1 Normal State............................................................................ 13
2.1.2.2 Stop-Grant State ...................................................................... 13
2.1.2.3 Stop Grant Snoop State............................................................. 14
2.1.2.4 Sleep State .............................................................................. 14
2.1.2.5 Deep Sleep State ...................................................................... 15
2.1.2.6 Deeper Sleep State ................................................................... 15
2.2 Enhanced Intel SpeedStep® Technology .............................................................. 15
2.3 Low-Power FSB Features .................................................................................... 16
2.4 Processor Power Status Indicator (PSI#) Signal..................................................... 17
3 Electrical Specifications ........................................................................................... 19
3.1 Power and Ground Pins ...................................................................................... 19
3.2 FSB Clock (BCLK[1:0]) and Processor Clocking...................................................... 19
3.3 Voltage Identification......................................................................................... 19
3.4 Catastrophic Thermal Protection .......................................................................... 22
3.5 Reserved and Unused Pins.................................................................................. 22
3.6 FSB Frequency Select Signals (BSEL[2:0])............................................................ 23
3.7 FSB Signal Groups............................................................................................. 23
3.8 CMOS Signals ................................................................................................... 25
3.9 Maximum Ratings.............................................................................................. 25
3.10 Processor DC Specifications ................................................................................ 26
4 Package Mechanical Specifications and Pin Information .......................................... 33
4.1 Package Mechanical Specifications ....................................................................... 33
4.2 Processor Pinout and Pin List .............................................................................. 39
4.3 Alphabetical Signals Reference ............................................................................ 75
5 Thermal Specifications and Design Considerations .................................................. 83
5.1 Monitoring Die Temperature ............................................................................... 84
5.1.1 Thermal Diode ....................................................................................... 85
5.1.2 Thermal Diode Offset .............................................................................. 87
5.1.3 Intel® Thermal Monitor........................................................................... 88
5.1.4 Digital Thermal Sensor............................................................................ 89
5.1.5 Out of Specification Detection .................................................................. 90
5.1.6 PROCHOT# Signal Pin ............................................................................. 90