Datasheet

Intel® Solid-State Drive DC S3610 Series
Pin
1
Function Definition Mating Order
P9
3,5
V
5
5V Power
2
nd
Mate
P10
3
Ground
Ground
1
st
Mate
P11
6
DAS
Device Activity Signal
2
nd
Mate
P12
3,4
Ground Ground 1
st
Mate
P13
7
V
12
12V Power 1
st
Mate
P14
7
V
12
12V Power 2
nd
Mate
P15
7
V
12
12V Power
2
nd
Mate
Notes:
1. All pins are in a single row, with a 1.27 mm (0.050-inch) pitch.
2. Pins P1, P2 and P3 are connected together, although they are not connected internally to the device. The host may put 3.3V on these pins.
3. The mating sequence is:
• ground pins P4-P6, P10, P12 and the 5V power pin P7
• signal pins and the rest of the 5V power pins P8-P9
4. Ground connectors P4 and P12 may contact before the other 1st mate pins in both the power and signal connectors to discharge ESD in a suita-
bly configured backplane connector.
5. Power pins P7, P8, and P9 are internally connected to one another within the device.
6. The host may ground P11 if it is not used for Device Activity Signal (DAS).
7. Pins P13, P14 and P15 are internally connected to one another within the device. The host may put 12V on these pins.
Table 18: Serial ATA Power Pin Definitions—1.8-inch Form Factors
Pin Function Definition Mating Order
1
P1
2
V
33
3.3V Power
2
nd
Mate
P2
2
V
33
3.3V Power, per-charge
2
nd
Mate
P3
3
Ground
--
1
st
Mate
P4
3
Ground
--
1
st
Mate
P5
4
V
5
5V Power; not connected.
1
st
Mate
P6
4
V
5
5V Power; not connected.
2
nd
Mate
P7
5
DAS
Device Activity Signal
2
nd
Mate
Key
Key
NC
NC
P8
6
Optional
Manufacturing Test Pin
2
nd
Mate
P9
6
Optional
Manufacturing Test Pin
2
nd
Mate
Notes:
1. All mate sequences assume zero angular offset between connectors.
2. P1 and P2 are internally connected to one another within the device.
3. Ground connectors P3 and P4 may contact before the other 1st mate pins in both the power and signal connectors to discharge ESD in a suitably
configure backplane connector.
4. Pins P5 and P6 are not connected internally to the device but there is an option to connect through a zero ohm stuffing resistor. The
host may put 5V on these pins.
5. The host may ground P7 if it is not used for Device Activity Signal (DAS).
6. P8 and P9 should not be connected by the host.
Product Specification March 2015
18 331342-003US