Datasheet

Intel
®
Solid-State Drive 310 Series
Intel
®
Solid-State Drive 310 Series
Product Specification February 2011
20 Order Number: 324042-007US
Intel
®
Solid-State Drive 310 Series
Appendix A IDENTIFY DEVICE Command Data
Table 12 details the sector data returned after issuing an IDENTIFY DEVICE command.
Table 12. Returned Sector Data
Word
F = Fixed
V = Variable
X = Both
Default Value Description
0 F 0040h General configuration bit-significant information
1 X 3FFFh Obsolete - Number of logical cylinders (16,383)
2 V C837h Specific configuration
3 X 0010h Obsolete - Number of logical heads (16)
4-5 X 0h Retired
6 X 003Fh Obsolete - Number of logical sectors per logical track (63)
7-8 V 0h Reserved for assignment by the CompactFlash* Association (CFA)
9X 0hRetired
10-19 F Varies Serial number (20 ASCII characters)
20-21 X 0h Retired
22 X 0h Obsolete
23-26 F Varies Firmware revision (8 ASCII characters)
27-46 F Varies Model number (Intel
®
Solid-State Drive)
47 F 8010h
7:0—Maximum number of sectors transferred per interrupt on MULTIPLE
commands
48 F 0h Reserved
49 F 2F00h Capabilities
50 F 4000h Capabilities
51-52 X 0h Obsolete
53 F 0007h Words 88 and 70:64 Valid
54 X 3FFFh Obsolete - Number of logical cylinders (16,383)
55 X 0010h Obsolete - Number of logical heads (16)
56 X 003Fh Obsolete - Number of logical sectors per logical track (63)
57-58 X FC1000FBh Obsolete
59 F 0101h Number of sectors transferred per interrupt on MULTIPLE commands
60-61 F
40GB: 04A8B570h
80GB: F8B00950h
Total number of user-addressable sectors
62 X 0h Obsolete
63 F 0007h Multi-word DMA modes supported/selected
64 F 0003h PIO modes supported
65 F 0078h Minimum Multiword DMA transfer cycle time per word
66 F 0078h Manufacturer’s recommended Multiword DMA transfer cycle time
67 F 0078h Minimum PIO transfer cycle time without flow control
68 F 0078h Minimum PIO transfer cycle time with IORDY flow control
69 F 4020h Command overlap and queuing
70 F 0h Reserved