Specifications

2-23
LOCAL X2APIC ARCHITECTURE
2.8.1 Consistency of APIC IDs and CPUID
The consistency of physical x2APIC ID in MSR 802H in x2APIC mode and the 32-bit
value returned in CPUID.0BH:EDX is facilitated by processor hardware.
CPUID.0BH:EDX will report the full 32 bit ID, in xAPIC and x2APIC mode. This allows
BIOS to determine if a system has processors with IDs exceeding the 8-bit initial
APIC ID limit (CPUID.01H:EBX[31:24]). Initial APIC ID (CPUID.01H:EBX[31:24]) is
always equal to CPUID.0BH:EDX[7:0].
If the values of CPUID.0BH:EDX reported by all logical processors in a system are
less than 255, BIOS can transfer control to OS in xAPIC mode.
If the values of CPUID.0BH:EDX reported by some logical processors in a system are
greater or equal than 255, BIOS must support two options to hand off to OS:
• If BIOS enables logical processors with x2APIC IDs greater than 255, then it
should enable X2APIC in Boot Strap Processor (BSP) and all Application
Processors (AP) before passing control to the OS. Application requiring processor
topology information must use OS provided services based on x2APIC IDs or
CPUID.0BH leaf.
• If a BIOS transfers control to OS in xAPIC mode, then the BIOS must ensure that
only logical processors with CPUID.0BH.EDX value less than 255 are enabled.
BIOS initialization on all logical processors with CPUID.0B.EDX values greater
than or equal to 255 must (a) disable APIC and execute CLI in each logical
processor, and (b) leave these logical processor in the lowest power state so that
these processors do not respond to INIT IPI during OS boot. The BSP and all the
enabled logical processor operate in xAPIC mode after BIOS passed control to
OS. Application requiring processor topology information can use OS provided
legacy services based on 8-bit initial APIC IDs or legacy topology information
from CPUID.01H and CPUID 04H leaves.
2.9 SYSTEM TRANSITIONS
This section describes implications for the x2APIC across system state transitions -
specifically initialization and booting.
The default will be for the BIOS to pass the control to the OS with the local x2APICs
in xAPIC mode if all x2APIC IDs reported by CPUID.0BH:EDX are less than 255, and
in x2APIC mode if there are any logical processor reporting its x2APIC ID at 255 or
greater.
2.10 LEGACY XAPIC CLARIFICATIONS
The x2APIC architecture eliminates/deprecates some of the features provided by the
legacy xAPIC and some of the legacy xAPIC features that were not used by prevailing
commercial system software. This section provides a list of the features/capabilities
that are not supported in the x2APIC architecture.