Specifications

Functional Architecture Intel® Server Board S3420GPRX TPS
Revision 1.1
Intel order number E92065-001
24
RAID capability provides high-performance RAID 0, 1, 5, and 10 functionality on up to six SATA
ports of PCH. Matrix RAID support is provided to allow multiple RAID levels to be combined on
a single set of hard drives, such as RAID 0 and RAID 1 on two disks. Other RAID features
include hot spare support, SMART alerting, and RAID 0 autos replace. Software components
include an Option ROM for pre-boot configuration and boot functionality, a Microsoft Windows*
compatible driver, and a user interface to configure and manage the RAID capability of the
Intel
®
3420 Chipset.
3.3.4 Low Pin Count(LPC) Interface
The Intel
®
3420 Chipset implements an LPC Interface as described in the LPC 1.1 Specification.
The Low Pin Count (LPC) bridge function of the Chipset resides in PCI Device 31: Function 0. In
addition to the LPC bridge interface function, D31:F0 contains other functional units including
DMA, interrupt controllers, timers, power management, system management, GPIO, and RTC.
3.3.5 Serial Peripheral Interface (SPI)
The Intel
®
3420 Chipset implements an SPI Interface as an alternative interface for the BIOS
flash device. An SPI flash device can be used as a replacement for the FWH, and is required to
support Gigabit Ethernet, Intel
®
Active Management Technology and integrated Intel
®
Quiet
System Technology. The Ibex Peak supports up to two SPI flash devices with speed up to 33
MHz utilizing two chip select pins.
3.3.6 RTC
The Intel
®
3420 Chipset contains a Motorola MC146818A-compatible real-time clock with 256
bytes of battery-backed RAM. The real-time clock performs two key functions: keeping track of
the time of day and storing system data, even when the system is powered down. The RTC
operates on a 32.768KHz crystal and a 3V battery. The RTC also supports two lockable
memory ranges. By setting bits in the configuration space, two 8-byte ranges can be locked to
read and write accesses. This prevents unauthorized reading of passwords or other system
security information. The RTC also supports a date alarm that allows for scheduling a wake up
event up to 30 days in advance, rather than just 24 hours in advance.
3.3.7 USB 2.0 Support
On the Intel
®
3420 Chipset, the USB controller functionality is provided by the dual EHCI
controllers with an interface for up to ten USB 2.0 ports. All ports are high-speed, full-speed, and
low-speed capable.
 Two external connectors are located on the back edge of the server board.
 Two internal 2x5 header (J1E2 and J1D1) are provided, each supporting two optional
USB 2.0 ports.
 One internal vertical USB 2.0 connector (J1J2) to support floppy.
 One internal 2x5 header (J3F2) for Intel
®
USB SSD.
3.3.7.1 Native USB Support
During the power-on self test (POST), the BIOS initializes an
d configures the USB subsystem.
The BIOS is capable of initializing and using the following types of USB devices.