Specifications

Functional Architecture Intel® Server Board S3420GPRX TPS

Revision 1.1

Intel order number E92065-001

3.2.7 Memory Upgrade Rules

Upgrading the system memory requires careful positioning of the DDR3 DIMMs based on the

following factors:

 Existing DDR3 DIMM population

 DDR3 DIMM characteristics

 Optimization techniques used by the Intel

Nehalem processor to maximize memory

bandwidth

In the Independent Channel mode, all DDR3 channels operate independently. Slot-to-slot DIMM

matching is not required across channels (for example, A1 and B1 do not have to match each

other in terms of size, organization, and timing). DIMMs within a channel do not have to match

in terms of size and organization, but they operate in the minimal common frequency. Also,

Independent Channel mode can be used to support single DIMM configuration in channel A and

in the Single Channel mode.

The user must observe the following general rules when selecting and configuring memory to

obtain the best performance from the system.

1. DDR3 RDIMMs must always be populated using a fill-farthest method.

2. DDR3 UDIMMs must always be populated on DIMM A1/A2/B1/B2.

3. Intel

Xeon

3400 Series Processors support either RDIMMs or UDIMMs.

4. RDIMM and UDIMM CANNOT be mixed.

5. The minimal memory set is {DIMMA1}.

6. DDR3 DIMMs on adjacent slots on the same channel do not need to be identical.

Each socket supports a maximum of six slots. Standard Intel

server boards and systems that

use the Intel

3420 chipset support three slots per DDR3 channel, two DDR3 channels per

socket, and only one socket is supported on the Intel

Server Board S3420GPRX.

3.2.7.1 Memory Configuration Table

Table 4. Memory Configuration Table

Channel A Channel B

A1 A2 A3 B1 B2 B3

X X

X X X

X X

RDIMM

X X X X