Technical Product Specification

Power Sub-system Intel® Server Chassis SC5650 TPS
Revision 1.2
Intel order number E39531-004
82
Item Description Minimum Maximum Units
T
pwok_holdup
Delay from loss of AC to de-assertion of PWOK 20 ms
T
pson_on_delay
Delay from PSON
#
active to output voltages within regulation
limits.
5 400
ms
T
pson_pwok
Delay from PSON
#
deactive to PWOK being de-asserted. 50 ms
T
pwok_on
Delay from output voltages within regulation limits to PWOK
asserted at turn on.
100 500
ms
T
pwok_off
Delay from PWOK de-asserted to output voltages (3.3V, 5V,
12V, -12V) dropping out of regulation limits.
1
ms
T
pwok_low
Duration of PWOK being in the de-asserted state during an
off / on cycle using AC or the PSON signal.
100
ms
T
sb_vout
Delay from 5VSB being in regulation to O/Ps being in
regulation at AC turn on.
50 1000
ms
T
5VSB_holdup
Time the 5VSB output voltage stays within regulation after
loss of AC.
70
ms
AC Input
Vout
PWOK
5VSB
PSON
T
sb_on_delay
T
AC_on_delay
T
pwok_on
T
vout_holdup
T
pwok_holdup
T
pson_on_delay
T
sb_on_delay
T
pwok_on
T
pwok_off
T
pwok_off
T
pson_pwok
T
pwok_low
T
sb_vout
AC turn on/off cycle
PSON turn on/off cycle
T
5VSB_holdup
Figure 20. Turn On/Off Timing (Power Supply Signals)
2.4.8.14 Residual Voltage Immunity in Standby mode
The power supply is immune to any residual voltage placed on its outputs (typically a leakage
voltage through the system from standby output) up to 500mV. There is no additional heat
generated or stress of any internal components with this voltage applied to any individual
output, or to all outputs simultaneously. Residual voltage also does not trip the power supply
protection circuits during turn on.