Technical Product Specification

Power Sub-system Intel® Server Chassis SC5650 TPS
Revision 1.2
Intel order number E39531-004
26
Table 20. Turn On / Off Timing
Item Description Minimum Maximum Units
T
sb_on_delay
Delay from AC being applied to 5VSB being within regulation.
1500 msec
T
ac_on_delay
Delay from AC being applied to all output voltages being within
regulation.
2500 msec
T
vout_holdup
Time all output voltages stay within regulation after loss of AC.
21 msec
T
pwok_holdup
Delay from loss of AC to de-assertion of PWOK.
20 msec
T
pson_on_delay
Delay from PSON
#
active to output voltages within regulation limits.
5 400 msec
T
pson_pwok
Delay from PSON
#
deactive to PWOK being de-asserted.
50 msec
T
pwok_on
Delay from output voltages within regulation limits to PWOK
asserted at turn on.
100 1000 msec
T
pwok_off
Delay from PWOK de-asserted to output voltages (3.3 V, 5 V, 12 V,
and -12 V) dropping out of regulation limits.
1 200 msec
T
pwok_low
Duration of PWOK being in the de-asserted state during an off/on
cycle using AC or the PSON signal.
100 msec
T
sb_vout
Delay from 5 VSB being in regulation to O/Ps being in regulation at
AC turn on.
50 1000 msec
T
5VSB_holdup
Time the 5 VSB output voltage stays within regulation after loss of
AC.
70 msec
Figure 9. Turn On/Off Timing (Power Supply Signals)
AC Input
Vout
PWOK
5VSB
PSON
T
sb_on_delay
T
AC_on_delay
T
pwok_on
T
vout_holdup
T
pwok_holdup
T
pson_on_delay
T
sb_on_delay
T
pwok_on
T
pwok_off
T
p
T
p
so
n
T
pwok_low
T
sb_vout
AC turn on/off cycle
PSON turn on/off cycle
T
5VSB
_
holdup