Technical Product Specification

Power Sub-system Intel® Server Chassis SC5650 TPS
Revision 1.2
Intel order number E39531-004
80
Table 91. Capacitive Loading Conditions
Output MIN MAX Units
+3.3V 250 6800
μF
+5V 400 4700
μF
+12V(1, 2, 3, 4,5) 500 each 11,000
μF
-12V 1 350
μF
+5VSB 20 350
μF
2.4.8.9 Closed Loop Stability
The power supply is unconditionally stable under all line / load / transient load conditions,
including capacitive load ranges. A minimum of 45 degrees phase margin and -10dB-gain
margin are required. Closed-loop stability is ensured at the maximum and minimum loads, as
applicable.
2.4.8.10 Common Mode Noise
The common mode noise on any output does not exceed 350mV pk-pk over the frequency band
of 10Hz to 30MHz.
2.4.8.11 Ripple / Noise
The maximum allowed ripple / noise output of the power supply is defined in the following table.
This is measured over a bandwidth of 10Hz to 20MHz at the power supply output connectors. A
10μF tantalum capacitor, in parallel with a 0.1μF ceramic capacitor, is placed at the point of
measurement.
Table 92. Ripple and Noise
+3.3V +5V +12V (1,2,3,4,5) -12V +5VSB
50mVp-p 50mVp-p 120mVp-p 120mVp-p 50mVp-p
2.4.8.12 Soft Starting
The power supply contains a control circuit that provides monotonic soft start for its outputs
without overstressing the AC line or any power supply components at any specified AC line or
load conditions. There is no requirement for rise time on the 5Vstby but the turn on/off is
monotonic.
2.4.8.13 Timing Requirements
The timing requirements for power supply operation are as follows. The output voltages must
rise from 10% to within regulation limits (T
vout_rise
) within 5 to 70 ms, except for 5VSB, which is
allowed to rise from 1.0 to 25 ms. The +3.3V, +5V and +12V output voltages should start to rise
approximately at the same time. All outputs must rise monotonically. Each output voltage shall