Technical Product Specification
Functional Architecture Intel® Server Board S5520UR and S5520URT TPS
Intel order number E44031-012 Revision 1.9
32
3.4.1 PCI Subsystem
The primary I/O buses for the Intel
®
Server Board S5520UR, S5520URT are PCI, PCI Express*
Gen1 and PCI Express* Gen2 with six independent PCI bus segments.
PCI Express* Gen1 and Gen2 are dual-simplex point-to point serial differential low-voltage
interconnects. A PCI Express* topology can contain a host bridge and several endpoints (I/O
devices). The signaling bit rate is 2.5 Gbit/s one direction per lane for Gen1 and 5.0 Gbit/s one
direction per lane for Gen2. Each port consists of a transmitter and receiver pair. A link between
the ports of two devices is a collection of lanes (x1, x2, x4, x8, x16, etc.). All lanes within a port
must transmit data using the same frequency. The PCI buses comply with the PCI Local Bus
Specification, Revision 2.3.
The following table lists the characteristics of the PCI bus segments. Details about each bus
segment follow the tables.
Table 9. Intel
®
Server Board S5520UR, S5520URT PCI Bus Segment Characteristics
PCI Bus Segment
Voltage
Width
Speed
Type
PCI I/O Card Slots
Port 0
ICH10R
3.3 V
x4
10 Gb/s
PCI
Express*
Gen1
x4 PCI Express* Gen1 throughput to the
Intel
®
5520 Chipset IOH
Port 5
ICH10R
3.3 V
x1
2.5 Gb/s
PCI
Express*
Gen1
x4 PCI Express* Gen1 throughput to an
on-board Integrated BMC
Port 1-4
ICH10R
3.3 V
x4
10 Gb/s
PCI
Express*
Gen1
x4 PCI Express* Gen1 throughput to a
midplane in the Intel
®
Server Chassis.
Uses bridge board for connection.
PE1, PE2
Intel
®
5520
Chipset IOH PCI
Express*
3.3 V
x4
10 Gb/s
PCI
Express*
Gen1
x4 PCI Express* Gen1 throughput to an
on-board NIC.
PE3, PE4
Intel
®
5520
Chipset IOH PCI
Express*
3.3 V
x8
40 Gb/S
PCI
Express*
Gen2
x8 PCI Express* Gen2 throughput to the
riser slot.
PE5, PE6
Intel
®
5520
Chipset
IOH PCI
Express*
3.3 V
x8
40 Gb/S
PCI
Express*
Gen2
x8 PCI Express* Gen2 throughput to the
riser slot.
PE7, PE8
Intel
®
5520
Chipset IOH PCI
Express*
3.3 V
x8
40 Gb/S
PCI
Express*
Gen2
x8 PCI Express* Gen2 throughput to the
riser slot.
PE9, PE10
Intel
®
5520
Chipset IOH PCI
Express*
3.3 V
x8
40 Gb/S
PCI
Express*
Gen2
x4 PCI Express* Gen2 throughput to each
of the two IO Module Mezzanine
connectors.