Technical Product Specification

Intel® Server Board S5520UR and S5520URT TPS Functional Architecture
Revision 1.9 Intel order number E44031-012
17
3.1.2 Turbo Mode
The Turbo Mode feature allows extreme edition processors to program thresholds for
power/current which can increase platform performance by 10%.
If the processor supports this feature, the BIOS setup provides an option to enable or disable
this feature. The default is disabled.
3.1.3 Hyperthreading
Most Intel
®
Xeon
®
processors support hyper threading. The BIOS detects processors that
support this feature and enables the feature during POST.
If the processor supports this feature, the BIOS Setup provides an option to enable or disable
this feature. The default is enabled.
3.1.4 Intel
®
QuickPath Interconnect
Intel
®
QPI is a cache-coherent, link-based interconnect specification for processor, chipset, and
I/O bridge components. Intel
®
QPI can be used in a wide variety of desktop, mobile, and server
platforms spanning IA-32 and Intel
®
Itanium
®
architectures. Intel
®
QPI also provides support for
high-performance I/O transfer between I/O nodes. It allows connection to standard I/O buses
such as PCI Express*, PCI-X, PCI (including peer-to-peer communication support), AGP,
through appropriate bridges.
Each Intel
®
QPI link consists of 20 pairs of uni-directional differential lanes for the transmitter
and receiver, plus a differential forwarded clock. A full width Intel
®
QPI link pair consists of 84
signals (20 differential pairs in each direction) plus a forwarded differential clock in each
direction. Each Intel
®
Xeon
®
Processor 5500 series processor and Intel
®
Xeon
®
Processor 5600
series processor supports two Intel
®
QPI links, one going to the other processor and the other
to the Intel
®
5520 Chipset IOH.
In the current implementation, Intel
®
QPI ports are capable of operating at transfer rates of up
to 6.4 GT/s. Intel
®
QPI ports operate at multiple lane widths (full - 20 lanes, half - 10 lanes,
quarter - 5 lanes) independently in each direction between a pair of devices communicating via
Intel
®
QPI. The server board supports full width communication only.