Technical Product Specification

Design and Environmental Specifications Intel® Server Board S5520UR and S5520URT TPS
Intel order number E44031-012 Revision 1.9
132
Item
Description
Minimum
Maximum
Units
asserted.
T
pwok_on
Delay from output voltages within regulation limits
to PWOK asserted at turn on.
100 500
Msec
T
pwok_off
Delay from PWOK de-asserted to output voltages
(3.3 V, 5 V, 12 V, -12 V) dropping out of
regulation limits.
1
Msec
T
pwok_low
Duration of PWOK being in the de-asserted state
during an off/on cycle using AC or the PSON
signal.
100
Msec
T
sb_vout
Delay from 5 VSB being in regulation to O/Ps
being in regulation at AC turn on.
50 1000
Msec
T
5VSB_holdup
Duration for which the 5 VSB output voltage stays
within regulation after loss of AC.
70
Msec
Figure 48. Turn On/Off Timing (Power Supply Signals)
9.3.11 Residual Voltage Immunity in Standby Mode
The power supply is immune to any residual voltage placed on its outputs (typically, a leakage
voltage through the system from standby output) up to 500 mV. There is no additional heat
generated, nor stressing of any internal components with this voltage applied to any individual
output, and all outputs simultaneously. It also does not trip the power supply protection circuits
during turn on.
The residual voltage at the power supply outputs for a no-load condition does not exceed 100
mV when AC voltage is applied and the PSON# signal is de-asserted.