Technical Product Specification

Intel® Server Board S5520UR and S5520URT TPS Design and Environmental Specifications
Revision 1.9 Intel order number E44031-012
131
Table 80. Output Voltage Timing
Item
Description
Minimum
Maximum
Units
T
vout_rise
Output voltage rise time from each main output.
5.0
1
70
1
Msec
T
vout_on
All main outputs must be within regulation of each
other within this time.
50 Msec
T
vout_off
All main outputs must leave regulation within this
time.
700 Msec
Note:
The 5 VSB output voltage rise time should be from 1.0 ms to 25.0 ms
Figure 47. Output Voltage Timing
Table 81. Turn On/Off Timing
Item
Description
Minimum
Maximum
Units
T
sb_on_delay
Delay from AC being applied to 5 VSB being
within regulation.
1500
Msec
T
ac_on_delay
Delay from AC being applied to all output
voltages being within regulation.
2500
Msec
T
vout_holdup
Duration for which all output voltages stay within
regulation after loss of AC.
Measured at 80% of
maximum load.
21
Msec
T
pwok_holdup
Delay from loss of AC to de-assertion of PWOK.
Measured at 80% of maximum load.
20
Msec
T
pson_on_delay
Delay from PSON
#
active to output voltages within
regulation limits.
5 400
Msec
T
pson_pwok
Delay from PSON
#
deactive to PWOK being de- 50 Msec