Technical Product Specification

Design and Environmental Specifications Intel® Server Board S5520UR and S5520URT TPS
Intel order number E44031-012 Revision 1.9
130
9.3.8 Common Mode Noise
The Common Mode noise on any output does not exceed 350 mV pk-pk over the frequency
band of 10 Hz to 30 MHz.
 The measurement is made across a 100Ω resistor between each of the DC outputs,
including ground, at the DC power connector and chassis ground (power subsystem
enclosure).
 The test setup uses a FET probe such as Tektronix* model P6046 or equivalent.
9.3.9 Ripple/Noise
The maximum allowed ripple/noise output of the power supply is defined in the following table.
This is measured over a bandwidth of 0 Hz to 20 MHz at the power supply output connectors. A
10 µF tantalum capacitor is placed in parallel to the 0.1 µF ceramic capacitor at the point
of measurement.
Table 79. Ripple and Noise
+3.3 V
+5 V
+12 V1,2.3,4
-12 V
+5 VSB
50 mVp-p 50 mVp-p 120 mVp-p 120 mVp-p 50 mVp-p
9.3.10 Timing Requirements
The timing requirements for the power supply operation are as follows:
 The output voltages must rise from 10% to within regulation limits (T
vout_rise
) within 5 ms
to 70 ms, except for 5 VSB, in which case it is allowed to rise from 1.0 ms to 25 ms.
 The +3.3 V, +5 V and +12 V output voltages should start to rise approximately at the
same time.
 All outputs must rise monotonically.
 The +5 V output needs to be greater than the +3.3 V output during any point of the
voltage rise.
 The +5 V output must never be greater than the +3.3 V output by more than 2.25 V.
 Each output voltage should reach regulation within 50 ms (T
vout_on
) of each other when
the power supply is turned on.
 Each output voltage should fall out of regulation within 400 msec (T
vout_off
) of each other
when the power supply is turned off.and shows the timing requirements for the power
supply being turned on and off via the AC input, with PSON held low and the PSON
signal, with the AC input applied.