Technical Product Specification

Intel® Server Board S5520UR and S5520URT TPS Connector/Header Locations and Pin-outs
Revision 1.9 Intel order number E44031-012
95
Note: Control panel features are also routed through the bridge board connector at location
J4G1, as is implemented in Intel
®
Server Systems configured using a bridge board and a hot-
swap backplane.
6.4.1 Power Button
The BIOS supports a front control panel power button. Pressing the power button initiates a
request that the Integrated BMC forwards to the ACPI power state machines in the chipset. It is
monitored by the Integrated BMC and does not directly control power on the power supply.
 Power Button — Off to On
The Integrated BMC monitors the power button and the wake-up event signals from the
chipset. A transition from either source results in the Integrated BMC starting the power-
up sequence. Since the processors are not executing, the BIOS does not participate in
this sequence. The hardware receives the power good and reset signals from the
Integrated BMC and then transitions to an ON state.
 Power Button — On to Off (operating system absent)
The System Control Interrupt (SCI) is masked. The BIOS sets up the power button
event to generate an SMI and checks the power button status bit in the ACPI hardware
registers when an SMI occurs. If the status bit is set, the BIOS sets the ACPI power
state of the machine in the chipset to the OFF state. The Integrated BMC monitors
power state signals from the chipset and de-asserts PS_PWR_ON to the power supply.
As a safety mechanism, the Integrated BMC automatically powers off the system in 4 to
5 seconds if the BIOS fails to service the request.
 Power Button — On to Off (operating system present)
If an ACPI operating system is running, pressing the power button switch generates a
request via SCI to the operating system to shut down the system. The operating system
retains control of the system and the operating system policy determines the sleep state
into which the system transitions, if any. Otherwise, the BIOS turns off the system.
6.4.2 Reset Button
The platform supports a front control panel reset button. Pressing the reset button initiates a
request that is forwarded by the Integrated BMC to the chipset. The BIOS does not affect the
behavior of the reset button.
6.4.3 NMI Button
The BIOS supports a front control panel NMI button. The NMI button may not be provided on all
front panel designs. Pressing the NMI button initiates a request that causes the Integrated BMC
to generate an NMI (non-maskable interrupt). The NMI is captured by the BIOS during boot
services time, and by the operating system during runtime. During boot services time, the BIOS
halts the system upon detection of the NMI.
6.4.4 Chassis Identify Button
The front panel chassis identify button toggles the state of the chassis ID LED. If the LED is off,
pushing the ID button lights the LED. It remains lit until the button is pushed again or until a
Chassis Identify or a Chassis Identify LED command is received to change the state of
the LED.