Technical Product Specification

IntelĀ® Workstation System SC5650SCWS TPS Power Sub-system
Revision 1.2
Intel order number: E81822-002
79
4.1.8.18 Over-temperature Protection (OTP)
The power supply is protected against over-temperature conditions caused by loss of fan
cooling or excessive ambient temperature. In an OTP condition the power supply will shut down.
When the power supply temperature drops to within specified limits, the power supply will
restore power automatically; the 5VSB always remains on. The OTP circuit has a built-in
hysteresis such that the power supply will not oscillate on and off due to a temperature
recovering condition. The OTP trip level has a minimum of 4 degrees C of ambient temperature
hysteresis.
4.1.9 Control and Indicator Functions
The following sections define the input and output signals from the power supply.
Signals that can be defined as low true use the following convention:
Signal
#
= low true
4.1.9.1 PSON# Input Signal
The PSON
#
signal is required to remotely turn on/off the power supply. PSON
#
is an active low
signal that turns on the +3.3V, +5V, +12V, and -12V power rails. When this signal is not pulled
low by the system, or left open, the outputs (except the +5VSB) turn off. This signal is pulled to
a standby voltage by a pull-up resistor internal to the power supply.
Table 46. PSON# Signal Characteristic
Signal Type
Accepts an open collector/drain input from the system.
Pull-up to VSB located in power supply.
PSON# = Low ON
PSON# = High or Open OFF
MIN MAX
Logic level low (power supply ON) 0V 1.0V
Logic level high (power supply OFF) 2.1V 5.25V
Source current, Vpson = low 4mA
Power up delay: Tpson_on_delay 5msec 400msec
PWOK delay: T pson_pwok 50msec
4.1.9.2 PWOK (Power OK) Output Signal
PWOK is a power OK signal and is pulled HIGH by the power supply to indicate that all the
outputs are within the regulation limits of the power supply. When any output voltage falls below
regulation limits or when AC power has been removed for a time sufficiently long so that power
supply operation is no longer guaranteed, PWOK will de-assert to a LOW state. The start of the
PWOK delay time is inhibited as long as any power supply output is in current limit.