Technical Product Specification

Intel® Workstation System SC5650SCWS TPS Functional Architecture
Revision 1.2
Intel order number: E81822-002
29
3.3.2 Supported Memory
z Intel
®
Workstation System SC5650SCWS supports up to 12 DDR3 DIMMs with 1.5
V.
z Intel
®
Workstation System SC5650SCWS supports Registered DDR3 DIMMs
(RDIMMs), and ECC Unbuffered DDR3 DIMMs (UDIMMs).
 Mixing of RDIMMs and UDIMMs is not supported.
 Mixing memory type, size, speed and/or rank on this platform has not been
validated and is not supported
 Mixing memory vendors is not supported on this platform by Intel
 Non-ECC memory is not supported and has not been validated in a server
environment
z Intel
®
Workstation System SC5650SCWS supports the following DIMM and DRAM
technologies:
 RDIMMs:
– Single-, Dual-, and Quad-Rank
– x 4 or x8 DRAM with 1 Gb and 2 Gb technology - no support for 2 Gb
DRAM based 2 GB or 4 GB RDIMMs
– DDR3 1333 (Single- and Dual-Rank only), DDR3 1066, and DDR3 800
 UDIMMs:
– Single- and Dual-Rank
– x8 DRAM with 1 Gb or 2 Gb technology
– DDR3 1333, DDR3 1066, and DDR3 800
3.3.3 Processor Cores, QPI Links and DDR3 Channels Frequency Configuration
The Intel
®
Xeon
®
5500 series processor or Intel
®
Xeon
®
Processor 5600 Series connects to
other Intel
®
Xeon
®
5500 series processors or Intel
®
Xeon
®
Processor 5600 Series and Intel
®
5520 IOH through the Intel
®
QPI link interface. The frequencies of the processor cores and the
QPI links of Intel
®
Xeon
®
5500 series processor or Intel
®
Xeon
®
Processor 5600 Series
processor are independent from each other. There are no gear-ratio requirements for the Intel
®
Xeon
®
Processor 5500 Series or Intel
®
Xeon
®
Processor 5600 Series.
Intel
®
5520 IOH supports 4.8 GT/s, 5.86 GT/s, and 6.4 GT/s frequencies for the QPI links.
During QPI initialization, the BIOS configures both endpoints of each QPI link to the same
supportable speeds for the correct operation.
During memory discovery, the BIOS arrives at a fastest common frequency that matches the
requirements of all components of the memory system and then configures the DDR3 DIMMs
for the fastest common frequency.
In addition, rules in the following tables also determine the global common memory system
frequency.