Datasheet

Table of Contents Intel® Server Board S5500WB TPS
Revision 1.9
Intel order number E53971-008
iv
Table of Contents
1. Introduction ........................................................................................................................ 1
1.1 Section Outline ....................................................................................................... 1
1.2 Server Board Use Disclaimer ................................................................................. 1
2. Server Board Overview ...................................................................................................... 2
2.1 Intel
®
Server Board S5500WB Server Board .......................................................... 4
2.2 Server Board Connector and Component Layout ................................................... 6
2.2.1 Board Rear Connector Placement .......................................................................... 8
2.2.2 Server Board Mechanical Drawings ....................................................................... 8
3. Functional Architecture ................................................................................................... 13
3.1 High Level Product Features ................................................................................ 13
3.2 Functional Block Diagram .................................................................................... 14
3.3 Processor Subsystem .......................................................................................... 15
3.3.1 Processor Support ............................................................................................... 15
3.3.2 Processor Population Rules ................................................................................. 15
3.3.3 Installing or Replacing the Processor ................................................................... 17
3.3.4 Intel
®
QuickPath Interconnect (Intel
®
QPI) ............................................................ 20
3.4 Intel
®
QuickPath Memory Controller ..................................................................... 21
3.4.1 Supported Memory ............................................................................................... 21
3.4.2 Memory Subsystem Nomenclature....................................................................... 21
3.4.3 ECC Support ........................................................................................................ 22
3.4.4 Memory Reservation for Memory-mapped Functions ........................................... 22
3.4.5 High-Memory Reclaim .......................................................................................... 22
3.4.6 Memory Population Rules .................................................................................... 23
3.4.7 Installing and Removing Memory ......................................................................... 23
3.4.8 Channel-Independent Mode ................................................................................. 25
3.4.9 Memory RAS ........................................................................................................ 25
3.4.10 Memory Error LED ............................................................................................... 26
3.5 Intel
®
5500 Chipset IOH ........................................................................................ 26
3.5.1 IOH24D PCI Express* .......................................................................................... 26
3.6 Management Engine ............................................................................................ 27
3.7 Intel
®
82801Jx I/O Controller Hub (ICH10R) ......................................................... 28
3.7.1 Serial ATA Support .............................................................................................. 28