Technical Product Specification

Intel® Server Boards S5000PSL and S5000XSL TPS Design and Environmental Specifications
Revision 1.7
Intel order number: D41763-008
63
8.4.5 Dynamic Loading
The output voltages should remain within limits for the step loading and capacitive loading
specified in the following table. The load transient repetition rate should be tested between 50
Hz and 5 kHz at duty cycles ranging from 10%-90%. The load transient repetition rate is only a
test specification. The step load may occur anywhere within the minimum load to the
maximum load conditions.
Table 45. Transient Load Requirements
Output Step Load Size
1
Load Slew Rate Test Capacitive Load
+3.3V 7.0A
0.25 A/ sec 4700 F
+5V 7.0A
0.25 A/ sec 1000 F
+12V 25A
0.25 A/ sec 4700 F
+5VSB 0.5A
0.25 A/ sec 20 F
Note:
1. Step loads on each 12V output may happen simultaneously.
8.4.6 Capacitive Loading
The power supply should be stable and meet all requirements with the following capacitive
loading ranges.
Table 46. Capacitive Loading Conditions
Output Minimum Maximum Units
+3.3 V 250 6800
F
+5 V 400 4700
F
+12 V
1, 2, 3, 4
500 each 11,000
F
-12 V 1 350
F
+5 VSB 20 350
F
Notes:
1. Maximum continuous total output power should not exceed 670 W.
2. Maximum continuous load on the combined 12 V output should not exceed 48 A.
3. Peak load on the combined 12 V output should not exceed 52 A.
4. Peak total DC output power should not exceed 730 W.