Technical Product Specification

Intel® Server Boards S5000PSL and S5000XSL TPS Design and Environmental Specifications
Revision 1.7
Intel order number: D41763-008
65
TP02313
V out
V1
V2
V3
V4
T
vout_on
T
vout_rise
10% V out
T
vout_off
Figure 25. Output Voltage Timing
Table 49. Turn On/Off Timing
Item Description Minimum Maximum Units
T
sb_on_delay
Delay from AC being applied to 5 VSB being within regulation. 1500 ms
T
ac_on_delay
Delay from AC being applied to all output voltages being within
regulation.
2500
ms
T
vout_holdup
Time all output voltages stay within regulation after loss of AC. 21 ms
T
pwok_holdup
Delay from loss of AC to de-assertion of PWOK 20 ms
T
pson_on_delay
Delay from PSON# active to output voltages within regulation
limits.
5 400
ms
T
pson_pwok
Delay from PSON# deactivate to PWOK being de-asserted. 50 ms
T
pwok_on
Delay from output voltages within regulation limits to PWOK
asserted at turn on.
100 500
ms
T
pwok_off
Delay from PWOK de-asserted to output voltages (3.3V, 5V,
12V, -12V) dropping out of regulation limits.
1
ms
T
pwok_low
Duration of PWOK being in the de-asserted state during an
off/on cycle using AC or the PSON signal.
100
ms
T
sb_vout
Delay from 5VSB being in regulation to O/Ps being in
regulation at AC turn on.
50 1000
ms
T
5VSB_holdup
Time the 5VSB output voltage stays within regulation after loss
of AC.
70
ms