Technical Product Specification

Intel® Server Boards S5000PSL and S5000XSL TPS Functional Architecture
Revision 1.7
Intel order number: D41763-008
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3.1.3.4.2 Sparing Mode Memory Configuration
The MCH provides memory sparing capabilities. Sparing is a RAS feature that involves
configuring a DIMM to be placed in reserve so it can be used to replace a DIMM that fails.
DIMM sparing occurs within a given bank of memory and is not supported across branches.
There are two supported Memory Sparing configurations, which are given below:
 Single Branch Mode Sparing
 Dual Branch Mode Sparing
3.1.3.4.2.1 Single Branch Mode Sparing
Channel A Channel B Channel C Channel D
Branch 0 Branch 1
Intel® 5000P/5000X Memor
y
Controller Hub
Slot 1
Slot 2
DIMM_C2
DIMM_C1
DIMM_D2
DIMM_D1
DIMM_A1
DIMM_A2
DIMM_B1
DIMM_B2
Figure 15. Single Branch Mode Sparing DIMM Configuration

DIMM_A1 and DIMM_B1 must be identical in organization, size, and speed.
 DIMM_A2 and DIMM_B2 must be identical in organization, size, and speed.
 DIMM_A1 and DIMM_A2 need not be identical in organization, size, and speed.
 DIMM_B1 and DIMM_B2 need not be identical in organization, size, and speed.
 Sparing should be enabled in the BIOS setup.
 The BIOS will configure Rank Sparing Mode.
 The larger of the pairs {DIMM_A1, DIMM_B1} and {DIMM_A2, DIMM_B2} will be
selected as the spare pair unit.
3.1.3.4.2.2 Dual Branch Mode Sparing
Dual branch mode sparing requires that all eight DIMM sockets be populated and must comply
with the following population rules:
 DIMM_A1 and DIMM_B1 must be identical in organization, size, and speed.
 DIMM_A2 and DIMM_B2 must be identical in organization, size, and speed.
 DIMM_C1 and DIMM_D1 must be identical in organization, size, and speed.
 DIMM_C2 and DIMM_D2 must be identical in organization, size, and speed.
 DIMM_A1 and DIMM_A2 need not be identical in organization, size, and speed.
 DIMM_B1 and DIMM_B2 need not be identical in organization, size, and speed.