User Guide

• Memory Initialization
o The Intel 5000 sequence MCH supports fully-buffered DIMM (FBDIMM)
technology. The integrated Memory Controller Hub on the Intel 5000
sequence MCH divides the FBDIMMs on the board into two autonomous sets
called branches. Each branch has two channels. In dual-channel mode,
FBDIMMs on adjacent channels work in lock-step to provide the same cache
line data, and a combined ECC. In the single-channel mode, only Slot 0,
Channel 0 is active.
BIOS is able to configure the memory controller dynamically in accordance
with the available FBDIMM population.
o The Intel 3000 MCH integrates a system memory DDR2 controller with two
64-bit wide interfaces. The integrated System Memory Controller directly
supports one or two channels of memory. The memory channels could be
asymmetric (i.e. single-channel mode or dual-channel asymmetric mode), or
interleaved. The dual-channel interleaved mode provides better bandwidth.
The MCH supports ECC DDR2 DIMMs.
BIOS is able to configure the memory controller dynamically in accordance
with the available DIMM population.
• POST Codes
o During the system boot process, BIOS executes several platform
configuration processes, each of which is assigned a specific hex POST code
number. As each configuration routine is started, the BIOS will display the
POST code on the POST code diagnostic LEDs found on the back edge of the
server board.
Each POST code is represented by a combination of colors from the four LEDs.
The LEDs are capable of displaying three colors: green, red, and amber. The
POST codes are divided into an upper nibble and a lower nibble. Each bit in
the upper nibble is represented by a red LED and each bit in the lower nibble
is represented by a green LED. If both bits are set in the upper and lower
nibbles then both red and green LEDs are lit, resulting in an amber color. If
both bits are clear, then the LED is off.
In the below example, BIOS sends a value of ACh to the diagnostic LED
decoder. The LEDs are decoded as follows:
Red bits = 1010b = Ah
Green bits = 1100b = Ch
Since the red bits correspond to the upper nibble and the green bits
correspond to the lower nibble, the two are concatenated to be ACh.
Appendix has a detailed listing of the POST Codes.
o BIOS uses beep codes to inform users on error conditions. The beep code is
followed by a user visible code on POST Progress LEDs.
• A 5 long and 5 short beep sequence indicates payload is corrupted or
10 Intel
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Rapid Boot Toolkit User Guide Ref# D96629-001