System Configuration User Guide

Term Definition
PSMI Power Supply Management Interface
PWM Pulse Width Modulation. The mechanism used to control the speed of system fans.
RAM Random Access Memory
RAS Reliability, availability, and serviceability
RC4 Rivest Cipher 4. A stream cipher designed by Rivest for RSA data security, now RSA security. It is a
variable key-size stream cipher with byte-oriented operations. The algorithm is based on a random
permutation.
RMCP+ Remote Management Control Protocol
ROM Read-only memory
RTC Real-time clock
SCI System Control Interrupt. A system interrupt used by hardware to notify the operating system of
ACPI events.
SDR Sensor data record
SDRAM Synchronous dynamic random access memory
SEL System event log
SHA1 Secure Hash Algorithm 1
SMBus A two-wire interface based on the I
2
C protocol. The SMBus is a low-speed bus that provides
positive addressing for devices and bus arbitration.
SMI Server Management Interrupt. SMI is the highest priority non-maskable interrupt.
SMM Server management mode
SMS Server management software
SNMP Simple Network Management Protocol
SOL Serial-over-LAN
SPT Straight pass-through
SRAM Static random access memory
UART Universal asynchronous receiver and transmitter
UDP User Datagram Protocol
UHCI Universal Host Controller Interface
VLAN Virtual local area network
1.5 Support Information
World Wide Web
http://support.intel.com/support/
For an updated support contact list, see http://www.intel.com/support/9089.htm/
12 Intel® System Configuration Utility – User Guide