Technical Product Specification

Intel
®
Server Board S2600WP TPS List of Figures
List of Figures
Figure 1. Intel
®
Server Board S2600WP (Base SKU) .................................................................. 3
Figure 2. Intel
®
Server Board S2600WPQ/S2600WPF Components ........................................... 5
Figure 3. Rear Panel Connector Placement ................................................................................ 5
Figure 4. Baseboard and Mounting Holes ................................................................................... 6
Figure 5. Intel
®
Server Board S2600WPQ/S2600WPF Functional Block Diagram ....................... 8
Figure 6. Intel
®
Server Board S2600WP Functional Block Diagram ............................................ 9
Figure 7. Processor Socket Assembly ....................................................................................... 10
Figure 8. Processor Socket ILM Variations ............................................................................... 10
Figure 9. Processor with IMC Functional Block Diagram ........................................................... 14
Figure 10. Intel
®
Server Board S2600WP DIMM Slot Layout ..................................................... 18
Figure 11. General Functional Block Diagram of Processor I/O Subsystem .............................. 21
Figure 12. PCI Express* Lane distribution scheme ................................................................... 22
Figure 13. Legacy VGA Socket configuration in BIOS ............................................................... 22
Figure 14. PCIe Riser for Slot 1 ................................................................................................ 23
Figure 15. PCIe Riser for Slot 2 ................................................................................................ 24
Figure 16. Intel
®
C600-A PCH connection ................................................................................. 25
Figure 17. 1GbE NIC port LED .................................................................................................. 32
Figure 18. ConnectX-3* function block diagram ........................................................................ 34
Figure 19. Connection between Mellanox* ConnectX-3* and QSFP .......................................... 35
Figure 20. Integrated BMC implementation overview ................................................................ 36
Figure 21. Integrated BMC Functional Block Diagram ............................................................... 36
Figure 22. Management Engine Distribution Model ................................................................... 63
Figure 23. Main Screen ............................................................................................................. 73
Figure 24. Advanced Screen ..................................................................................................... 76
Figure 25. Processor Configuration Screen ............................................................................... 79
Figure 26. Power and Performance Configuration Screen ........................................................ 86
Figure 27. Memory Configuration Screen .................................................................................. 89
Figure 28. Memory RAS and Performance Configuration Screen ............................................. 93
Figure 29. Mass Storage Controller Configuration Screen ........................................................ 95
Figure 30. PCI Configuration Screen ......................................................................................... 98
Figure 31. NIC Configuration Screen ...................................................................................... 101
Figure 32. UEFI Network Stack Configuration Screen ............................................................. 104
Figure 33. UEFI Option ROM Configuration Screen ................................................................ 105
Figure 34. i350 NIC Configuration Screen ............................................................................... 106
Figure 35. Processor PCIe Link Speed Configuration Screen ................................................. 107
Figure 36. CPU 1 PCIe Link Speed Configuration in Detail ..................................................... 107
Figure 37. CPU 2 PCIe Link Speed Configuration in Detail ..................................................... 108
Figure 38. Serial Port Configuration Screen ............................................................................ 109
Figure 39. USB Configuration Screen ..................................................................................... 110
Revision 1.6 Intel order number G44057-007 ix