Technical Product Specification

Intel
®
Server Board S2600WP TPS Product Architecture Overview
 12 10-bit ADCs
 Sixteen fan tachometers
 Eight Pulse Width Modulators (PWM)
 Chassis intrusion logic
 JTAG Master
 Eight I
2
C interfaces with master-slave and SMBus* timeout support. All interfaces are
SMBus* 2.0 compliant
 Parallel general-purpose I/O Ports (16 direct, 32 shared)
 Serial general-purpose I/O Ports (80 in and 80 out)
 Three UARTs
 Platform Environmental Control Interface (PECI)
 Six general-purpose timers
 Interrupt controller
 Multiple SPI flash interfaces
 NAND/Memory interface
 Sixteen mailbox registers for communication between the BMC and host
 LPC ROM interface
 BMC watchdog timer capability
 SD/MMC card controller with DMA support
 LED support with programmable blink rate controls on GPIOs
 Port 80h snooping capability
 Secondary Service Processor (SSP), which provides the HW capability of offloading
time critical processing tasks from the main ARM core
ServerEngines* Pilot III contains an integrated SIO, KVMS subsystem, and graphics controller
with the following features:
3.6.1
Super I/O Controller
The integrated super I/O controller provides support for the following features as implemented
on the server board:
 Keyboard Style/BT interface for BMC support
 Two Fully Functional Serial Ports, compatible with the 16C550
 Serial IRQ Support
 Up to 16 Shared GPIO available for host processor
 Programmable Wake-up Event Support
 Plug and Play Register Set
 Power Supply Control
3.6.1.1
Keyboard and Mouse Support
The server board does not support PS/2 interface keyboards and mice. However, the system
BIOS recognizes USB specification-compliant keyboards and mice.
Revision 1.6 Intel order number G44057-007 37