Technical Product Specification

Intel
®
Server Board S2600WP TPS Product Architecture Overview
diagnostic SW or OS installation image and direct the client to boot from IDE-R. The IDE-R
interface is the same as the IDE interface and is compliant with ATA/ATAPI-6 specifications.
IDE-R does not conflict with the usage of PXE boot. The system can support both interfaces
and continue to boot from the PXE as with any other boot devices. However, during
management boot session the Intel
®
AMT solution will use IDE-R when remote boot is required.
The devices attached to the IDER channel are only visible to software during management boot
session. During normal boot session the IDE-R channel does not appear as a present device.
3.4.18
Manageability
Intel
®
C600-A PCH integrates several functions designed to manage the system and lower the
total cost of ownership (TCO) of the system. These system management functions are designed
to report errors, diagnose the system, and recover from system lockups without the aid of an
external microcontroller. The functionality provided by the SPS firmware is different from Intel
®
Active Management Technology (Intel
®
AMT or AT) provided by the ME on client platforms.
 TCO Timer: The Intel
®
C600-A PCH’s integrated programmable TCO timer is used to
detect system locks. The first expiration of the timer generates an SMI# that the system
can use to recover from a software lock. The second expiration of the timer causes a
system reset to recover from a hardware lock.
 Processor Present Indicator: The Intel
®
C600-A PCH looks for the processor to fetch
the first instruction after reset. If the processor does not fetch the first instruction, the
PCH will reboot the system.
 ECC Error Reporting: When detecting an ECC error, the host controller has the ability
to send one of several messages to the Intel
®
C600-A PCH. The host controller can
instruct the PCH to generate any of SMI#, NMI, SERR#, or TCO interrupt.
 Function Disable: The Intel
®
C600-A PCH provides the ability to disable the following
integrated functions: LAN, USB, LPC, Intel
®
HD Audio, SATA, PCI Express* or SMBus*.
Once disabled, these functions no longer decode I/O, memory, or PCI configuration
space. Also, no interrupts or power management events are generated from the disabled
functions.
 Intruder Detect: The Intel
®
C600-A PCH provides an input signal (INTRUDER#) that
can be attached to a switch that is activated by the system case being opened. The
Intel
®
C600-A PCH can be programmed to generate either SMI# or TCO interrupt due to
an active INTRUDER# signal.
3.4.19
System Management Bus (SMBus 2.0*)
The Intel
®
C600-A PCH contains a SMBus* Host interface that allows the processor to
communicate with SMBus* slaves. This interface is compatible with most I
2
C devices. Special
I
2
C commands are implemented.
The Intel
®
C600-A PCH’s SMBus* host controller provides a mechanism for the processor to
initiate communications with SMBus* peripherals (slaves). Also, the PCH supports slave
functionality, including the Host Notify protocol. Hence, the host controller supports eight
command protocols of the SMBus* interface (see System Management Bus (SMBus*)
Specification, Version 2.0): Quick Command, Send Byte, Receive Byte, Write Byte/Word, Read
Byte/Word, Process Call, Block Read/Write, and Host Notify.
Revision 1.6 Intel order number G44057-007 31