Technical Product Specification

Product Architecture Overview Intel
®
Server Board S2600WP TPS
On the Intel
®
Server Board S2600WP, a total of 16 DIMM slots is provided (two CPUs, four
Channels/CPU, and two DIMMs/Channel). The nomenclature for DIMM sockets is detailed in
the following table.
Table 8. Intel
®
Server Board S2600WP DIMM Nomenclature
Processor Socket 1
Processor Socket 2
(0)
Channel A
(1)
Channel B
(2)
Channel C
(3)
Channel D
(0)
Channel E
(1)
Channel F
(2)
Channel G
(3)
Channel H
A1
B1
C1
D1
E1
F1
G1
H1
A2
B2
C2
D2
E2
F2
G2
H2
Figure 10. Intel
®
Server Board S2600WP DIMM Slot Layout
The following are generic DIMM population requirements that generally apply to the Intel
®
Server Board S2600WP:
 All DIMMs must be DDR3 DIMMs.
 Unbuffered DIMMs should be ECC.
 Mixing of Registered and Unbuffered DIMMs is not allowed per platform.
 Mixing of LRDIMM with any other DIMM type is not allowed per platform.
 Mixing of DDR3 voltages is not validated within a socket or across sockets by Intel. If
1.35V (DDR3L) and 1.50V (DDR3) DIMMs are mixed, the DIMMs will run at 1.50V.
 Mixing of DDR3 operating frequencies is not validated within a socket or across sockets
by Intel. If DIMMs with different frequencies are mixed, all DIMMs will run at the common
lowest frequency.
 Quad rank RDIMMs are supported but not validated by Intel.
 A maximum of eight logical ranks (ranks seen by the host) per channel is allowed.
3.3.2.3
Publishing System Memory
 The BIOS displays the “Total Memory” of the system during POST if Display Logo is
disabled in the BIOS setup. This is the total size of memory discovered by the BIOS
during POST, and is the sum of the individual sizes of installed DDR3 DIMMs in the
system.
Intel order number G44057-007 Revision 1.6
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