User Guide

Intel
®
System Configuration Utility – User Guide 3
Term
Definition
BMC
Baseboard management controller
Bridge
Circuitry connecting one computer bus to another, allowing an agent on one to access the other.
BSP
Bootstrap processor
CBC
Chassis bridge controller. A microcontroller connected to one or more other CBCs. Together they
bridge the IPMB buses of multiple chassis.
CLI
Command-line interface
CLTT
Closed-loop thermal throttling (memory throttling mode)
CMOS
In terms of this specification, this describes the PC-AT compatible region of battery-backed 128
bytes of memory on the server board.
CSR
Control and status register
D-cache
Data cache. Processor-local cache dedicated for memory locations explicitly loaded and stored by
running code.
DHCP
Dynamic Host Configuration Protocol
DIB
Device Information Block
DPC
Direct Platform Control
EEPROM
Electrically erasable programmable read-only memory
EMP
Emergency management port
FML
Fast management link
FNI
Fast management link network interface
FRB
Fault resilient booting
FRU
Field replaceable unit
FSB
Front side bus
FTM
Firmware transfer mode
GPIO
General-purpose input/output
HSBP
Hot-swap backplane
HSC
Hot-swap controller
I-cache
Instruction cache. Processor-local cache dedicated for memory locations retrieved through
instruction fetch operations.
I2C
Inter-integrated circuit bus
IA
Intel
®
architecture
IBF
Input buffer
ICH
I/O controller hub
IERR
Internal error
INIT
Initialization signal
IPMB
Intelligent Platform Management Bus
IPMI
Intelligent Platform Management Interface
ITP
In-target probe
KCS
Keyboard controller style
KT
Keyboard text