Datasheet

Intel

82599 10 GbE Controller—Errata

33 The EEPROM Core Clocks Gate Disable Setting

Impacts Link Status During D3 State

Problem:

Setting EEPROM bit Core Clocks Gate Disable has side effects when both manageability and Wake on

LAN (WoL) are disabled for a port. The Link and LEDs are both active in D3 when they should be

disabled.

The Core Clocks Gate Disable bit is set in the 82599's manageability EEPROM images. Starting from

EEPROM Dev Starter, Revision 4.25 and later it is set for all images.

See also “82599 LAN Port #1 SFI Link Instability” erratum.

Implication:

Link is kept up and the LEDs remain active.

A link partner might see the link and think that the 82599 is up and running.

LEDs might indicate a link, though no entity (software/firmware/WoL) requires the link.

Workaround:

Configure the link settings to an incompatible mode when entering D3 and re-configure to correct the

link setting when moving back to D0.

Disable link when entering D3 by configuring setting AUTOC2.FASM and AUTOC2.PDD bits (bits 30 and

28). Enable link back when moving back to D0 by clearing these bits.

Status: B0=Yes; NoFix

Workaround Implemented in Intel SW Drivers starting with Release 18.3 (ixgbe v3.15.1)

34 Priority Flow Control (PFC) to Some Traffic Classes

(TCs) Might Impact Traffic on Other Traffic Classes

Problem:

DMA-Tx stops processing new transmit requests on all TCs if the following scenario happens:

• The 82599 is configured to DCB mode with PFC enabled.

• One or more TCs receive a per-priority pause.

• There is no data to be transmitted in the descriptor queues that belong to TCs other than the one

being flow controlled (exposure to this combination is only on the specific clock cycle that the

internal pause related full indication rises).

To recover, new transmit requests are processed when the pause timer expires, and transmit on a

paused TC is re-enabled.

Implication:

Latency of packets might increase (a new packet might wait extra time until the pause timer expires).

Overall throughput is not expected to be impacted, since this issue happens only when Tx is empty.

Note that there is no violation in the paused TCs.