Datasheet

Specification Clarifications—Intel

82599 10 GbE Controller

6 AN 1G TIMEOUT Only Works When the Link

Partner Is Idle

The auto-negotiation timeout mechanism (PCS1GLCTL.AN_1G_TIMEOUT_EN) only works if the 1G

partner is sending idle code groups continuously for the duration of the timeout period, which is the

usual case. However, if the partner is transmitting packets, an auto-negotiation timeout will not occur

since auto-negotiation is restarted at the beginning of each packet. If the partner has an application

that indefinitely transmits data despite the lack of any response, it is possible that a link will not be

established. If this is a concern, the auto-negotiation timeout mechanism may be considered unreliable

and an additional software mechanism could be used to disable auto-negotiation if sync is maintained

without a link being established (PCS1GLSTA.SYNC_OK_1G=1b and LINKS.LINK_UP=0b) for an

extended period of time.

7 Link Establishment State Machine (LESM)

“Legacy” XAUI-based switches developed prior to the IEEE 802.3ap standard will Tx only in one lane

(Lane 0) during link detection. Typically, these devices will only transition to a XAUI-like 10 GbE link

when all 4 pairs of their receivers are active. Additionally, IEEE 802.3ap compliant devices such as the

82599 controller are required to transmit auto-neg only on Lane 0 per Clause 73.3 and the Intel device

will also only parallel-detect a XAUI-like 10 GbE link when all 4 pairs of their receivers are active.

Therefore, a speedlock condition can occur when the 82599 device is connected to a legacy XAUI-based

switch since both devices are capable of 10 GbE XAUI-like parallel detection but only the lane 0

transmitters on each device are active. One device needs to turn on all 4 transmitters in order for the

other device to see 10 GbE XAUI-like mode; otherwise, either no link or a 1 GbE link is observed in the

system, depending on the specific behavior of the switch link state machine.

LESM was developed by Intel to break the speedlock condition described above. The feature can be

implemented in the 82599 controller with on-chip firmware and is used to switch the link-mode-select

setting in the AUTOC register to try a different configuration after timeout. For example, after trying CL

73 AN and Parallel Detect, it might change to XAUI-mode (which turns on all 4 lane transmitters) and

check link status.

If you are experiencing link issues with the 82599 when configured to Backplane Auto Negotiation and

connected to a XAUI-based switch, please contact your Intel representative to get an EEPROM file with

LESM enabled.

8 PCIe Timeout Interrupt

The PCIe Timeout Exception (TO) bit in the PCIe Interrupt Cause (PICAUSE) register is set when a

timeout occurs on an access to the address space of this port. This includes accesses initiated by the

EEPROM auto-load function and manageability firmware, in addition to accesses from the PCIe

interface. This interrupt bit does not necessarily indicate a problem with a PCIe transaction and further

analysis would be required to determine the source of the problem.