Technical Product Specification

System Power Sub-system Intel® Server System P4000IP and Intel® Workstation System P4000CR Family TPS

Revision 1.2 Intel order number G38159-002

Table 43. PSON# Signal Characteristic

Signal Type

Accepts an open collector/drain input from the system. Pull-

up to VSB located in power supply.

PSON

= Low

PSON

= High or Open

OFF

MIN

MAX

Logic level low (power supply ON)

1.0V

Logic level high (power supply OFF)

2.0V

3.46V

Source current, Vpson = low

4mA

Power up delay: T

pson_on_delay

5msec

400msec

PWOK delay: T pson_pwok

50msec

Figure 22. PSON# Required Signal Characteristic

2.2.6.2 PWOK (Power OK) Output Signal

PWOK is a power OK signal and will be pulled HIGH by the power supply to indicate that all the

outputs are within the regulation limits of the power supply. When any output voltage falls below

regulation limits or when AC power has been removed for a time sufficiently long so that power

supply operation is no longer guaranteed, PWOK will be de-asserted to a LOW state. See the

table below for a representation of the timing characteristics of PWOK. The start of the PWOK

delay time shall inhibited as long as any power supply output is in current limit.

 1.0 V PS

is enabled

 2.0 V PS

is disabled

1.0V

2.0V

Enabled

Disabled

0.3V ≤ Hysteresis ≤ 1.0V

In 1.0-2.0V input voltages range is required

3.46V