Technical Product Specification

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Functional Architecture Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPS

40 Intel order number G34153-004 Revision 1.4

3.3.18 System Management Bus (SMBus* 2.0)

The Intel

C602 Chipset contains an SMBus* host interface that allows the processor to

communicate with SMBus* slaves. This interface is compatible with most I

C devices. Special

C commands are implemented.

The SMBus* host controller of Intel

C602 Chipset provides a mechanism for the processor to

initiate communications with SMBus* peripherals (slaves). Also, the Intel

C602 Chipset

supports slave functionality, including the Host Notify protocol. Hence, the host controller

supports eight command protocols of the SMBus* interface (see System Management Bus

(SMBus*) Specification, Version 2.0): Quick Command, Send Byte, Receive Byte, Write

Byte/Word, Read Byte/Word, Process Call, Block Read/Write, and Host Notify.

The SMBus* of Intel

C602 Chipset also implements hardware-based Packet Error Checking for

data robustness and the Address Resolution Protocol (ARP) to dynamically provide address to

all SMBus* devices.

3.3.19 Integrated NVSRAM Controller

The Intel

C602 Chipset has an integrated NVSRAM controller that supports up to 32KB

external device. The host processor can read and write data to the NVSRAM component.

3.3.20 Virtualization Technology for Directed I/O (Intel

VT-d)

The Intel

C602 Chipset provides hardware support for implementation of Intel

Virtualization

Technology with Directed I/O (Intel

VT-d). The Intel

VT-d technology consists of components

that support the virtualization of platforms based on Intel

Architecture Processors. The Intel

VT-d Technology enables multiple operating systems and applications to run in independent

partitions. A partition behaves like a virtual machine (VM) and provides isolation and protection

across partitions. Each partition is allocated its own subset of host physical memory.

3.3.21 JTAG Boundary-Scan

The Intel

C602 Chipset adds the industry standard JTAG interface and enables Boundary-

Scan in place of the XOR chains used in previous generations of chipsets. Boundary-Scan can

be used to ensure device connectivity during the board manufacturing process. The JTAG

interface allows system manufacturers to improve efficiency by using industry available tools to

test the Intel

C602 Chipset on an assembled board. Since JTAG is a serial interface, it

eliminates the need to create probe points for every pin in an XOR chain. This eases pin

breakout and trace routing and simplifies the interface between the system and a bed-of-nails

tester.

3.3.22 KVM/Serial Over Lan (SOL) Function

These functions support redirection of keyboard, mouse, and text screen to a terminal window

on a remote console. The keyboard, mouse, and text redirection enables the control of the client

machine through the network. Text, mouse, and keyboard redirection allows the remote

machine to control and configure the client by entering BIOS setup. The KVM/SOL function

emulates a standard PCI serial port and redirects the data from the serial port to the

management console using LAN. KVM has additional requirements of internal graphics and

SOL may be used when KVM is not supported.