Technical Product Specification

Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPS Appendix A: Integration and Usage Tips
Revision 1.4 Intel order number G34153-004 117
Table 65. Loading Conditions
3.3V
5V
12V1
12V2
12V3
-12V
5Vstby
Total
Power
12V
Power
3.3V/5V
Power
Load1
18
12.1
12
12
11.7
0
0.3
550
428
120
Load2
13.5
15
12
12
11.2
0.5
0.3
549
422
120
Load3
2.5
2
20
20
4.2
0
0.3
550
530
18
Load4
2.5
2
13.1
13.1
18
0
0.3
550
530
18
Load5
0.5
0.3
15
15
6.5
0.5
3
462
438
3
Load6
16
4
1
1
3.5
0
0.3
140
66
73
Load7
16
13
1
1
9
0.5
3
271
132
118
9.4.3 Standby Output
The 5VSB output shall be present when an AC input greater than the power supply turn on
voltage is applied.
9.4.4 Voltage Regulation
The power supply output voltages must stay within the following voltage limits when operating at
steady state and dynamic loading conditions. These limits include the peak-peak ripple/noise.
These shall be measured at the output connectors.
Table 66.Voltage Regulation Limits
Parameter
Tolerance
Min
Nom
Max
Units
+3.3V
-3%/+5%
+3.20
+3.30
+3.46
V
rms
+5V
-4%/+5%
+4.80
+5.00
+5.25
V
rms
+12V1
-4%/+5%
+11.52
+12.00
+12.60
V
rms
+12V2
-4%/+5%
+11.52
+12.00
+12.60
V
rms
+12V3
-4%/+5%
+11.52
+12.00
+12.60
V
rms
-12V
-10%/+10%
-13.20
-12.00
-10.80
V
rms
+5VSB
-4%/+5%
+4.80
+5.00
+5.25
V
rms
9.4.5 Dynamic Loading
The output voltages shall remain within limits specified for the step loading and capacitive
loading specified in the table below. The load transient repetition rate shall be tested between
50Hz and 5kHz at duty cycles ranging from 10%-90%. The load transient repetition rate is only
a test specification. The  step load may occur anywhere within the MIN load to the MAX load
conditions.
Table 67. Transient Load Requirements
Output
 Step Load Size
(See note 2)
Load Slew Rate
Test Capacitive Load
+3.3V
6.0A
0.5 A/sec
970 F
+5V
4.0A
0.5 A/sec
400 F