Technical Product Specification

System Power Sub-system Intel® Server System P4000IP and Intel® Workstation System P4000CR Family TPS
Revision 1.2 Intel order number G38159-002
61
Figure 27. PSON# Required Signal Characteristic
2.3.6.2 PWOK (Power OK) Output Signal
PWOK is a power OK signal and will be pulled HIGH by the power supply to indicate that all the
outputs are within the regulation limits of the power supply. When any output voltage falls below
regulation limits or when AC power has been removed for a time sufficiently long so that power
supply operation is no longer guaranteed, PWOK will be de-asserted to a LOW state. See the
following table for a representation of the timing characteristics of PWOK. The start of the
PWOK delay time shall inhibited as long as any power supply output is in current limit.
Table 65. PWOK Signal Characteristics
Signal Type
PWOK = High
Power OK
PWOK = Low
Power Not OK
MIN
MAX
Logic level low voltage, Isink=400uA
0V
0.4V
Logic level high voltage, Isource=200A
2.4V
3.46V
Sink current, PWOK = low
400uA
Source current, PWOK = high
2mA
PWOK delay: T
pwok_on
100ms
1000ms
PWOK rise and fall time
100sec
Power down delay: T
pwok_off
1ms
200msec
 1.0 V PS
is enabled
 2.0 V PS
is disabled
1.0V
2.0V
Enabled
Disabled
0.3V ≤ Hysterisis ≤ 1.0V
In 1.0-2.0V input voltages range is required
3.46V
0V