Technical Product Specification

Intel® Server System P4000IP and InteWorkstation System P4000CR Family TPS System Power Sub-system
58 Intel order number G38159-002 Revision 1.2
2.3.4.12 Timing Requirements
These are the timing requirements for the power supply operation. The output voltages must
rise from 10% to within regulation limits (T
vout_rise
) within 5 to 70ms. For 12VSB, it is allowed to
rise from 1.0 to 25ms. All outputs must rise monotonically. Table below shows the timing
requirements for the power supply being turned on and off by the AC input, with PSON held low
and the PSON signal, with the AC input applied.
Table 61. Timing Requirements
Item
Description
MIN
MAX
UNITS
T
vout_rise
Output voltage rise time
5.0 *
70 *
ms
T
sb_on_delay
Delay from AC being applied to 12VSBbeing within
regulation.
1500
ms
T
ac_on_delay
Delay from AC being applied to all output voltages
being within regulation.
3000
ms
T
vout_holdup
Time 12V output voltage stay within regulation after
loss of AC.
11
ms
T
pwok_holdup
Delay from loss of AC to de-assertion of PWOK
10
ms
T
pson_on_delay
Delay from PSON# active to output voltages within
regulation limits.
5
400
ms
T
pson_pwok
Delay from PSON# deactivate to PWOK being de-
asserted.
5
ms
T
pwok_on
Delay from output voltages within regulation limits to
PWOK asserted at turn on.
100
500
ms
T
pwok_off
Delay from PWOK de-asserted to output voltages
dropping out of regulation limits.
1
ms
T
pwok_low
Duration of PWOK being in the de-asserted state
during an off/on cycle using AC or the PSON signal.
100
ms
T
sb_vout
Delay from 12VSBbeing in regulation to O/Ps being in
regulation at AC turn on.
50
1000
ms
T
12VSB_holdup
Time the 12VSBoutput voltage stays within regulation
after loss of AC.
70
ms
* The 12VSB output voltage rise time shall be from 1.0ms to 25ms.