Technical Product Specification

Intel® Server System R2000IP Product Family TPS Power Subsystem
Revision 1.1
29
Table 24. PSON
#
Signal Characteristic
Signal Type
Accepts an open collector/drain input from the system. Pull-up to +3.3V
located in power supply.
PSON
#
= Low
ON
PSON
#
= High or Open
OFF
MIN
MAX
Logic level low (power supply ON)
0V
0.4V
Logic level high (power supply OFF)
2.4 V
3.46 V
Source current, Vpson = low
2 mA
Power up delay: T
pson_on_delay
5 ms
400 ms
PWOK delay: T
pson_pwok
50 ms
3.8.2 PSKILL
The purpose of the PSKill pin is to allow for hot swapping of the power supply without arcing in
the connector contacts. The PSKill pin on the power supply is shorter than the other signal pins.
When a power supply is operating in parallel with other power supplies and then extracted from
the system, the PSKill pin will quickly turn off the power supply and prevent arcing of the DC
output contacts. The DC output contacts must not arc under this condition. T
PSKill
(shown below
in Table 16 PSKILL Signal Characteristics) is the minimum time delay from the PSKill pin un-
mating to when the power pins un-mate. The power supply must discharge its output inductor
within this time from the un-mating of the PSKill pin. When the PSKill signal pin is not pulled
down or left opened (power supply is extracting from the system), the power supply should shut
down regardless of the condition of the PSON
#
signal. The mating pin of this signal in the
system should be tied to ground. Internal to the power supply, the PSKill pin should be
connected to a standby voltage through a pull-up resistor. Upon receiving a LOW state signal at
the PSKill pin, the power supply will be allowed to turn on by the PSON
#
signal. A logic LOW on
this pin by itself should not turn on the power outputs.
Table 25. PSKILL Signal Characteristics
Signal Type (Input Signal to Supply)
Accepts a ground input from the system. Pull-up to +3.3V
located in the power supply.
PSKILL = Low, PSON
#
= Low
ON
PSKILL = Open, PSON
#
= Low or Open
OFF
PSKILL = Low, PSON
#
= Open
OFF
MIN
MAX
Logic level low (power supply ON)
0V
0.4V
Logic level high (power supply OFF)
2.4V
3.46V
Source current, Vpskill = low
2mA
Delay from PSKILL= High to power supply turned off
(T
PSKill
)
1
100s
T
PSKill
is the time from the PSKill signal de-asserting HIGH to the power supply’s output inductor
discharging.
Note: If PS module latch release would require removal of AC connector plug this signal is not
necessary.
3.8.3 PWOK (Power OK) Output Signal
PWOK is a power OK signal and will be pulled HIGH by the power supply to indicate that all the
outputs are within the regulation limits of the power supply. When any output voltage falls below