S2600GZ and S2600GL

Table Of Contents
Product Architecture Overview Intel® Server Board S2600GZ/GL TPS
o No SAS RAID 5 support
Maximum drive support = 32 (in arrays with 8 port SAS), 16 (in arrays with 4 port SAS), 128 (JBOD)
Open Source Compliance = Yes (uses MDRAID)
OS Support = Windows 7*, Windows 2008*, Windows 2003*, RHEL* 6.2
1
and later, SLES* 11 w/SP2
1
and later, VMWare* 5.x.
Utilities = Windows* GUI and CLI, Linux CLI, DOS CLI, and EFI CLI
Uses Matrix Storage Manager for Windows*
MDRAID supported in Linux (Does not require a driver)
Note: No boot drive support to targets attached through SAS expander card.
1) See latest product errata list for support status.
Product Errata are documented in the Intel
®
Server Board S2600GZ/GL, Intel
®
Server System R1000GZ/GL,
Intel
®
Server System R2000GZ/GL Monthly Specification Update which can be downloaded from
www.intel.com
.
3.3.4
Manageability
The chipset integrates several functions designed to manage the system and lower the total cost of ownership
(TCO) of the system. These system management functions are designed to report errors, diagnose the system,
and recover from system lockups without the aid of an external microcontroller.
TCO Timer. The chipset’s integrated programmable TCO timer is used to detect system locks. The first
expiration of the timer generates an SMI# that the system can use to recover from a software lock. The
second expiration of the timer causes a system reset to recover from a hardware lock.
Processor Present Indicator. The chipset looks for the processor to fetch the first instruction after
reset. If the processor does not fetch the first instruction, the chipset will reboot the system.
ECC Error Reporting. When detecting an ECC error, the host controller has the ability to send one of
several messages to the chipset. The host controller can instruct the chipset to generate either SMI#,
NMI, SERR#, or TCO interrupt.
Function Disable. The chipset provides the ability to disable the following integrated functions: LAN,
USB, LPC, SATA, PCI Express* or SMBus*. Once disabled, these functions no longer decode I/O,
memory, or PCI configuration space. Also, no interrupts or power management events are generated
from the disabled functions.
3.4
Integrated Baseboard Management Controller Overview
Revision 2.4
44