Technical Product Specification

Intel® Server Boards S4600LH2/T2 TPS

Revision 2.0

Device 3 contains the standard PCI Express/ PCI configuration registers including PCI Express Memory

Address Mapping registers. It also contains the extended PCI Express

configur

ati

space that include

PCI Express error status/control registers and Isochronous and Virtual Channel controls.

• Device 4: This device contains the Standard PCI registers for each of its functions. This device

implements 8 functions for the 8 DMA Channels and also contains Memory Map I/O registers.

• Device 5: Integrated I/O Core. This device contains the Standard PCI registers for each of its functions.

This device implements three functions; Function 0 contains Address Mapping, Intel

Virtualization

Technology (Intel

VT) for Directed I/O (Intel

VT-d) related registers and other system management

registers. Function 2 contains I/O RAS registers, Function 4 contains System Control/Status registers

and miscellaneous control/status registers on power management and throttling. Function 6 contains the

IIO Switch and IRP Performance monitor registers.

The following sub-sections will describe the server board features that are directly supported by the processor

IIO module. These include the Riser Card Slots, Network Interface, and connectors for the optional I/O

modules. Features and functions of the Intel C600 Series Chipset will be described in its own dedicated

section.

3.2.3.3 Riser Card Support

The server board supports two 3-slot riser cards identified by IO Riser 1 (Right) and IO Riser 2 (Left). The two

3- slot PCIe Risers support up to x48 lanes of PCIe Gen3 through a custom interconnect (3 connector blocks

at 120 pins per connector (360 pins total per riser).The PCIe signals for each riser card slot are supported each

by two installed processors. A total of 48 PCIe Gen3 signals are routed to Riser. For Riser 1 (Right) there are

16 lanes from CPU 1 and 32 lanes from CPU 4. For Riser 2 (Left), there are 16 lanes from CPU 2 and 32

lanes from CPU 3.

Additional support

• One double wide GPGPU or Graphics card per riser (up to 300W active supported, passive not

supported) OR

• Two single wide GPGPU or Graphics cards per riser (up to 150W active supported, passive not

supported) OR

• Two single wide full height full length (FHFL) cards per riser (25W supported for each) OR

• Three single wide full height half length (FHHL) cards per riser (one of these are internal only

slots). Un-shadowed PCIe slots support 25W each and shadowed supports 10W each

• 3.3V VR for PCIe card power is located on the riser