Technical Product Specification

Appendix B: Integrated BMC Sensor Tables Intel® Server Boards S4600LH2/T2 TPS
Revision 2.0
222
Processor 1 Thermal
Margin
(P1 Therm Margin)
74h All
Temperatu
re
01h
Threshol
d
01h
- - -
Analo
g
R, T A –
Processor 2 Thermal
Margin
(P2 Therm Margin)
75h All
Temperatu
re
01h
Threshol
d
01h
- - -
Analo
g
R, T A –
Processor 1 Thermal
Control %
(P1 Therm Ctrl %)
78h All
Temperatu
re
01h
Threshol
d
01h
[u] [c,nc]
nc =
Degraded
c = Non-
fatal
As
and
De
Analo
g
Trig
Offset
A –
Processor 2 Thermal
Control %
(P2 Therm Ctrl %)
79h All
Temperatu
re
01h
Threshol
d
01h
[u] [c,nc]
nc =
Degraded
c = Non-
fatal
As
and
De
Analo
g
Trig
Offset
A –
Processor 1 ERR2
Timeout
(P1 ERR2)
7Ch All
Processor
07h
Digital
Discrete
03h
01 – State
Asserted
fatal
As
and
De
–
Trig
Offset
A –
Processor 2 ERR2
Timeout
(P2 ERR2)
7Dh All
Processor
07h
Digital
Discrete
03h
01 – State
Asserted
fatal
As
and
De
–
Trig
Offset
A –
Catastrophic Error
(CATERR)
80h All
Processor
07h
Digital
Discrete
03h
01 – State
Asserted
fatal
As
and
De
–
Trig
Offset
M –
Processor0 MSID
Mismatch
(P0 MSID Mismatch)
81h All
Processor
07h
Digital
Discrete
03h
01 – State
Asserted
fatal
As
and
De
–
Trig
Offset
M –
Processor Population
Fault
(CPU Missing)
82h All
Processor
07h
Digital
Discrete
03h
01 – State
Asserted
Fatal
As
and
De
–
Trig
Offset
M –
Processor1 MSID
Mismatch
(P1 MSID Mismatch)
87h All
Processor
07h
Digital
Discrete
03h
01 – State
Asserted
fatal
As
and
De
–
Trig
Offset
M –
Processor 1 VRD
Temperature
(P1 VRD Hot)
90h All
Temperatu
re
01h
Digital
Discrete
05h
01 - Limit
exceeded
Non-fatal
As
and
De
–
Trig
Offset
M –
Processor 2 VRD
Temperature
(P2 VRD Hot)
91h All
Temperatu
re
01h
Digital
Discrete
05h
01 - Limit
exceeded
Non-fatal
As
and
De
–
Trig
Offset
M –