Technical Product Specification

Intel® Server System R2000LH2/T2 Product Family TPS Appendix B: POST Code Diagnostic LED Decoder
Revision 1.0
99
In the following example, the BIOS sends a value of ACh to the diagnostic LED decoder. The
LEDs are decoded as follows.
Table 44. POST Progress Code LED Example
LEDs
Upper Nibble AMBER LEDs
Lower Nibble GREEN LEDs
MSB
LSB
LED #7
LED #6
LED #5
LED #4
LED #3
LED #2
LED #1
LED #0
8h
4h
2h
1h
8h
4h
2h
1h
Status
ON
OFF
ON
OFF
ON
ON
OFF
OFF
Results
1
0
1
0
1
1
0
0
Ah
Ch
Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are concatenated as ACh
The following table provides a list of all POST progress codes..
Table 45. POST Progress Codes
Checkpoint
Diagnostic LED Decoder
Description
1 = LED On, 0 = LED Off
Upper Nibble
Lower Nibble
MSB
LSB
8h
4h
2h
1h
8h
4h
2h
1h
LED #
#7
#6
#5
#4
#3
#2
#1
#0
SEC Phase
01h
0
0
0
0
0
0
0
1
First POST code after CPU reset
02h
0
0
0
0
0
0
1
0
Microcode load begin
03h
0
0
0
0
0
0
1
1
CRAM initialization begin
04h
0
0
0
0
0
1
0
0
Pei Cache When Disabled
05h
0
0
0
0
0
1
0
1
SEC Core At Power On Begin.
06h
0
0
0
0
0
1
1
0
Early CPU initialization during Sec Phase.
07h
0
0
0
0
0
1
1
1
Early SB initialization during Sec Phase.
08h
0
0
0
0
1
0
0
0
Early NB initialization during Sec Phase.
09h
0
0
0
0
1
0
0
1
End Of Sec Phase.
0Eh
0
0
0
0
1
1
1
0
Microcode Not Found.
0Fh
0
0
0
0
1
1
1
1
Microcode Not Loaded.
PEI Phase
10h
0
0
0
1
0
0
0
0
PEI Core
11h
0
0
0
1
0
0
0
1
CPU PEIM
15h
0
0
0
1
0
1
0
1
NB PEIM
19h
0
0
0
1
1
0
0
1
SB PEIM
MRC Process Codes – MRC Progress Code Sequence is executed
PEI Phase continued…
31h
0
0
1
1
0
0
0
1
Memory Installed
32h
0
0
1
1
0
0
1
0
CPU PEIM (Cpu Init)
33h
0
0
1
1
0
0
1
1
CPU PEIM (Cache Init)
34h
0
0
1
1
0
1
0
0
CPU PEIM (BSP Select)