Technical Product Specification

Intel® Server Board S1600JP TPS Appendix C: BIOS Sensors and SEL Data
Appendix C: BIOS Sensors and SEL Data
BIOS owns a set of IPMI-compliant Sensors. These are actually divided in ownership between
BIOS POST (GID = 01) and BIOS SMI Handler (GID = 33). The SMI Handler Sensors are
typically for logging runtime error events, but they are active during POST and may log errors
such as Correctable Memory ECC Errors if they occur.
It is important to remember that a Sensor is uniquely identified by the combination of Sensor
Owner plus Sensor Number. There are cases where the same Sensor Number is used with
different Sensor Owners – this is not a conflict. For example, in the BIOS Sensors list there is a
Sensor Number 83h for Sensor Owner 01h (BIOS POST) as well as for Sensor Owner 33h (SMI
Handler), but these are two distinct sensors reporting the same type of event from different
sources (Generator IDs 01h and 33h).
On the other hand, each distinct Sensor (GID + Sensor Number) is defined by one specific
Sensor Type describing the kind of data being reported, and one specific Event Type describing
the type of event and the format of the data being reported.
Table 98. BIOS Sensor and SEL Data
Sensor Name
Sensor
Number
Sensor
Owner
(GID)
Sensor Type
Event/Reading Type
Offset Values
Event Data 2
Event Data 3
Mirroring
Redundancy State
01h
33h (SMI
Handler)
0Ch
(Memory)
0Bh (Discrete,
Redundancy State)
0h = Fully Redundant
2h = Redundancy
Degraded
ED2 =[7:4] =
Mirroring
Domain
0-1 =
Channel Pair
for Socket
[3:2] =
Reserved
[1:0] = Rank
on DIMM
0-3 = Rank
Number
ED3 =
[7:5]= Socket ID
0-3 = CPU1-4
[4:3] = Channel
0-3 = Channel A-
D for Socket
[2:0] = DIMM
0-2 = DIMM 1-3
on Channel
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