Intel Server Board S2400BB

Intel® Server Board S2400BB TPS

Revision 2.0

Figure 10. Intel

Server Board S2400BB Memory Slot Layout

The following are DIMM population requirements.

• All DIMMs must be DDR3 DIMMs

• Unbuffered DIMMs can be ECC or non-ECC. However, Intel only validates and supports ECC memory

for its server products.

• Mixing of Registered and Unbuffered DIMMs is not allowed

• Mixing of LRDIMM with any other DIMM type is not allowed

• Mixing of DDR3 voltages is not validated within a socket or across sockets by Intel. If 1.35V (DDR3L)

and 1.50V (DDR3) DIMMs are mixed, the DIMMs will run at 1.50V.

• Mixing of DDR3 operating frequencies is not validated within a socket or across sockets by Intel. If

DIMMs with different frequencies are mixed, all DIMMs will run at the common lowest frequency.

• Quad rank RDIMMs are supported but not validated by Intel.

• A maximum of 8 logical ranks (ranks seen by the host) per channel is allowed.

• Mixing of ECC and non-ECC DIMMs is not allowed per platform. Intel does not support non-ECC

memory in its server products.

• DIMMs with different timing parameters can be installed on different slots within the same channel, but

only timings that support the slowest DIMM will be applied to all. As a consequence, faster DIMMs will be

operated at timings supported by the slowest DIMM populated.

• When one DIMM is used, it must be populated in the BLUE DIMM slot (farthest away from the CPU) of a

given channel.