Intel® Server Board S2400BB Technical Product Specification Intel order number G48778-003 Revision 2.
Intel® Server Board S2400BB TPS Revision History Date ii May 2012 Revision Number 1.0 Modifications 1st Production Release Dec 2013 2.0 Added support for Intel Xeon processor E5-2400 v2 product family ® ® Revision 2.
Intel® Server Board S2400BB TPS Disclaimers INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT.
Intel® Server Board S2400BB TPS Table of Contents 1. Introduction ........................................................................................................................1 1.1 Chapter Outline ......................................................................................................1 1.2 Server Board Use Disclaimer .................................................................................1 1.3 Product Errata .................................................................
Intel® Server Board S2400BB TPS 3.4.3 Baseboard Management Controller ...................................................................... 35 3.4.3.1 Remote Keyboard, Video, Mouse, and Storage (KVMS) Support ...................... 36 3.4.3.2 Integrated BMC Embedded LAN Channel ......................................................... 36 4. System Security ...............................................................................................................37 4.1 BIOS Password Protection ........
Intel® Server Board S2400BB TPS 6.10.10.1 SNMP Platform Event Traps (PETs) ............................................................. 59 6.10.11 Alert Policy Table ................................................................................................. 59 6.10.11.1 E-mail Alerting ............................................................................................... 59 6.10.12 SM-CLP (SM-CLP Lite) ........................................................................................
Intel® Server Board S2400BB TPS 8.5 Serial Port Connectors ......................................................................................... 79 8.6 Other Connectors and Headers............................................................................ 80 9. Reset & Recovery Jumpers ............................................................................................ 81 9.1 BIOS Recovery Jumper........................................................................................ 82 9.
Intel® Server Board S2400BB TPS Appendix E: POST Code Errors ................................................................................................ 120 Appendix F: Supported Intel® Server Systems ........................................................................ 126 viii Revision 2.
Intel® Server Board S2400BB TPS List of Figures Figure 1. Intel® Server Board S2400BB.......................................................................................2 Figure 2. Server Board Component / Features Identification ....................................................... 4 Figure 3. Intel® Light Guided Diagnostic LED Identification ......................................................... 5 Figure 4. Jumper Block Identification ..............................................................
Intel® Server Board S2400BB TPS List of Tables Table 1. Intel® Server Board S2400BB Feature Set .................................................................... 3 Table 2. Mixed Processor Configurations Error Summary ......................................................... 11 Table 3. UDIMM Support Guidelines - Intel® Xeon® Processor E5-2400 and E5-2400 v2 Product Families ..................................................................................................................................
Intel® Server Board S2400BB TPS Table 42. Hard Drive Activity Header Pin-out ("HDD_LED") ...................................................... 80 Table 43. SystemStatus LED State Definitions ......................................................................... 86 Table 44. BMC Boot/Reset Status LED Indicators .................................................................... 88 Table 45. Power Supply DC Power Output Connector Pinout ................................................... 90 Table 46.
Intel® Server Board S2400BB TPS xii Revision 2.
Intel® Server Board S2400BB TPS 1. Introduction This Technical Product Specification (TPS) provides board-specific information detailing the features, functionality, and high-level architecture of the Intel® Server Board S2400BB. Design-level information related to specific server board components and subsystems can be obtained by ordering External Product Specifications (EPS) or External Design Specifications (EDS) related to this server generation.
Intel® Server Board S2400BB TPS 2. Product Overview The Intel® Server Board S2400BB is a monolithic printed circuit board assembly with features that are intended for high density 1U and 2U rack mount servers. This server board is designed to support the Intel® Xeon® processor E5-2400 product family and Intel® Xeon® processor E5-2400 v2 product family. Previous generation Intel® Xeon® processors are not supported. ® Figure 1. Intel Server Board S2400BB 2 Revision 2.
Intel® Server Board S2400BB TPS ® Table 1.
Intel® Server Board S2400BB TPS 2.1 Server Board Component / Feature Identification The following illustration provides a general overview of the server board, identifying key feature and component locations. Figure 2. Server Board Component / Features Identification 4 Revision 2.
Intel® Server Board S2400BB TPS ® Figure 3. Intel Light Guided Diagnostic LED Identification See Chapter 10 – Light Guided Diagnostics for additional details. Revision 2.
Intel® Server Board S2400BB TPS Figure 4. Jumper Block Identification See Chapter 9 - Reset & Recovery Jumpers for additional details. Label A B C D E F G Description NIC 1 NIC 2 NIC 3 NIC 4 Video Serial Port A USB Ports ® Figure 5. Intel Server Board S2400BB External I/O Connector Layout 6 Revision 2.
Intel® Server Board S2400BB TPS 3. Product Architecture Overview The architecture of Intel® Server Board S2400BB is developed around the integrated features and functions of the Intel® Xeon® processor E5-2400 product family, the Intel® C602 (-A) chipset, the Intel® Ethernet Controller I350 GbE controller chip, and the Server Engines* Pilot-III Server Management Controller.
Intel® Server Board S2400BB TPS 3.1 Processor Support The server board includes two Socket-B2 (LGA1356) processor sockets and can support one or two of the following processors: • Intel® Xeon® processor E5-2400 product family, with a Thermal Design Power (TDP) of up to 95W. • Intel® Xeon® processor E5-2400 v2 product family, with a Thermal Design Power (TDP) of up to 95W. Note: Previous generation Intel® Xeon® processors are not supported on the Intel server board described in this document.
Intel® Server Board S2400BB TPS Figure 8. Processor Installation 3.1.2 Processor Population Rules Note: Although the server board does support dual-processor configurations consisting of different processors that meet the defined criteria below, Intel does not perform validation testing of this configuration. For optimal system performance in dual-processor configurations, Intel recommends that identical processors be installed.
Intel® Server Board S2400BB TPS For Fatal Errors during processor initialization, the System Status LED will be set to a steady Amber color, indicating an unrecoverable system failure condition. Major: If the “Post Error Pause” setup option is enabled in BIOS Setup, the system goes directly to the Error Manager to display the error, and logs the POST Error Code to SEL. Operator intervention is required to continue booting the system.
Intel® Server Board S2400BB TPS Table 2. Mixed Processor Configurations Error Summary Error Processor family not Identical Severity Fatal System Action The BIOS detects the error condition and responds as follows: Logs the POST Error Code into the System Event Log (SEL). Alerts the BMC to set the System Status LED to steady Amber. Displays “0194: Processor family mismatch detected” message in the Error Manager.
Intel® Server Board S2400BB TPS Error Processor Intel® QuickPath Interconnect link frequencies not identical Severity Fatal System Action The BIOS detects the QPI link frequencies and responds as follows: Adjusts all QPI interconnect link frequencies to highest common frequency. No error is generated – this is not an error condition. Continues to boot the system successfully.
Intel® Server Board S2400BB TPS 3.2 Processor Functions Overview With the release of the Intel® Xeon® processor E5-2400 product family, several key system components, including the CPU, Integrated Memory Controller (IMC), and Integrated IO Module (IIO), have been combined into a single processor package and feature per socket; one Intel® QuickPath Interconnect point-to-point links capable of up to 8.0 GT/s, up to 24 lanes of Gen 3 PCI Express* links capable of 8.
Intel® Server Board S2400BB TPS connection between two components. This supports traffic in both directions simultaneously. To facilitate flexibility and longevity, the interconnect is defined as having five layers: Physical, Link, Routing, Transport, and Protocol. The Intel® QuickPath Interconnect includes a cache coherency protocol to keep the distributed memory and caching structures coherent during system operation. It supports both low-latency source snooping and a scalable home snoop behavior.
Intel® Server Board S2400BB TPS • • 3.2.2.1 o CPU1 Channel Mirror Pairs (B,C) o CPU2 Channel Mirror Pairs (E,F) Error Containment Recovery Improved Thermal Throttling with dynamic Closed Loop Thermal Throttling (CLTT) Memory thermal monitoring support for DIMM temperature Supported Memory ® ® Table 3.
Intel® Server Board S2400BB TPS ® ® Table 6. LRDIMM Support Guidelines – Intel Xeon Processor E5-2400 v2 Product Family Ranks Per DIMM & Data Width Speed (MT/s) and Voltage Validated by Slot per Channel (SPC) and DIMM Per Channel (DPC) Memory Capacity Per DIMM 1 DIMM / Channel 1.35V 1.5V QRx4 (DDP) 8Rx4 (QDP) 3.2.2.2 2 DIMMs / Channel 1.35V 1.
Intel® Server Board S2400BB TPS ® Figure 10. Intel Server Board S2400BB Memory Slot Layout The following are DIMM population requirements. • • • • • • • • • • • All DIMMs must be DDR3 DIMMs Unbuffered DIMMs can be ECC or non-ECC. However, Intel only validates and supports ECC memory for its server products. Mixing of Registered and Unbuffered DIMMs is not allowed Mixing of LRDIMM with any other DIMM type is not allowed Mixing of DDR3 voltages is not validated within a socket or across sockets by Intel.
Intel® Server Board S2400BB TPS • • 3.2.2.3 When single, dual and quad rank DIMMs are populated for 2DPC, always populate the higher number rank DIMM first (starting from the farthest slot), for example, first quad rank, then dual rank, and last single rank DIMM. Mixing of quad ranks DIMMs (RDIMM Raw Cards F and H) in one channel and two DIMMs in other channel (2DPC) on the same CPU socket is not validated.
Intel® Server Board S2400BB TPS set to support all DIMMs populated (i.e, DIMMs with slower timings will force faster DIMMs to the slower common timing modes). Lockstep or Mirrored Pair D A E B F C Lockstep or Mirrored Pair Figure 11. Memory Channel Pairing for RAS Support 3.2.2.4.1 Independent Channel Mode In x4 SDDC configurations, each channel is running independently (nonlock-step), that is, each cache-line from memory is provided by a channel.
Intel® Server Board S2400BB TPS When Mirroring Mode is operational, each channel in a pair is “mirrored” by the other channel. The impact on Effective Memory size is to reduce by half the total amount of installed memory available for use. When Mirroring Mode is operational, the system treats Correctable Errors the same way as it would in Independent channel mode. There is a correctable error threshold. Correctable error counts accumulate by rank, and the first event is logged.
Intel® Server Board S2400BB TPS 3.2.2.8.1 Correctable Memory ECC Error Handling A “Correctable ECC Error” is one in which a single-bit error in memory contents is detected and corrected by use of the ECC Hamming Code included in the memory data. For a correctable error, data integrity is preserved, but it may be a warning sign of a true failure to come. Note that some correctable errors are expected to occur. The system BIOS has logic to cope with the random factor in correctable ECC errors.
Intel® Server Board S2400BB TPS • • • PCH is required and allowed for the system, any sockets which do not connect to PCH would use this port as a standard x4 PCI Express 2.0 interface.
Intel® Server Board S2400BB TPS 3.2.3.1 Riser Card Support The server board includes two riser card slots labeled “RISER_Slot_1” and “RISER_Slot_2”. The following diagrams illustrate the general server board architecture supporting these two slots. Riser cards for this server are NOT interchangeable between riser slots. .
Intel® Server Board S2400BB TPS CPU #1 provides Riser Slot #1 with x16 PCIe bus lanes which can be bifurcated to support multi-slot riser cards. The number of PCIe lanes routed to Riser Slot #2 is dependent on the system configuration. In a single processor configuration, CPU #1 will route x8 (default) PCIe bus lanes to Riser Slot #2.
Intel® Server Board S2400BB TPS 3.2.3.2 I/O Module Support To broaden the standard on-board feature set, the server board provides support for one of several available IO Module options. The I/O module attaches to a high density 80-pin connector on the server board (J2B1) labeled “IO_Module” and is supported by x8 PCIe Gen3 signals from the IIO module of the CPU #1 processor . Figure 16. Server Board Layout - I/O Module Connector Supported I/O modules include: ® Table 8.
Intel® Server Board S2400BB TPS 3.3 Intel® C602 (-A) Chipset Functional Overview The following sub-sections provide an overview of the key features and functions of the Intel® C602 (-A) chipset. For more comprehensive chipset specific information, refer to the Intel® C600 Series chipset documents listed in the Reference Document list.
Intel® Server Board S2400BB TPS USB. The server board utilizes nine USB 2.0 ports from the chipset. All ports are high-speed, full- speed, and low-speed capable.
Intel® Server Board S2400BB TPS Each Ethernet port drives two LEDs located on each network interface connector. The LED at the right of the connector is the link/activity LED and indicates network connection when on, and transmit/receive activity when blinking. The LED at the left of the connector indicates link speed as defined in the following table. Table 9.
Intel® Server Board S2400BB TPS 3.3.4 Chipset Embedded AHCI SATA Controller Embedded into the Intel® C602 chipset is a dual port Advance Host Controller Interface (AHCI) SATA controller. On the server board, the AHCI ports are routed to two connectors: • • One 6 Gb/sec SATA port routed to a a white 7-pin SATA port labeled “SATA-1” One 6 Gb/sec SATA port routed to the mSATA connector Figure 19.
Intel® Server Board S2400BB TPS 3.3.4.1 mSATA SSD Support The server board provides support for a mSATA SSD storage device. Figure 21. mSATA SSD Support The mSATA storage device plugs in to a 52-pin PCIe mini-connector on the server labeled “mSATA SSD”. mSATA SSD features include: • • • Capacities ranging from 40GB to 128GB Small foot print Low power Note: Visit Http://www.intel.com/support for a list of supported InnoDisk* SATA DOM parts. 3.3.
Intel® Server Board S2400BB TPS By default, the server board provides support for four SATA ports routed to the mini-SAS connector labeled SCU_0. The mini-SAS connector labeled SCU_1 is NOT functional by default, and is only enabled with the addition of an Intel® RAID C600 Upgrade Key option supporting 8 SAS/SATA ports. The server board is capable of supporting additional chipset embedded SAS, SATA, and RAID options when configured with one of several available Intel® RAID C600 Upgrade Keys.
Intel® Server Board S2400BB TPS 3.3.6.1 Intel® Embedded Server RAID Technology 2 (ESRT2) Features of the embedded software RAID option Intel® Embedded Server RAID Technology 2 (ESRT2) include the following: • • • • • • • 3.3.6.
Intel® Server Board S2400BB TPS memory, or PCI configuration space. Also, no interrupts or power management events are generated from the disabled functions. 3.4 Integrated Baseboard Management Controller Overview The server board utilizes the I/O controller, Graphics Controller, and Baseboard Management features of the Emulex* Pilot-III Management Controller. The following is an overview of the features as implemented on the server board from each embedded controller.
Intel® Server Board S2400BB TPS Figure 24. Integrated BMC Functional Block Diagram 3.4.1 Super I/O Controller The integrated super I/O controller provides support for the following features as implemented on the server board: • • • • • • • • 3.4.1.
Intel® Server Board S2400BB TPS • • • DDR-3 memory interface with 16 MB of memory allocated and reported for graphics memory High speed Integrated 24-bit RAMDAC Single lane PCI-Express host interface running at Gen 1 speed The integrated video controller supports all standard IBM VGA modes. The following table shows the 2D modes supported for both CRT and LCD: Table 11.
Intel® Server Board S2400BB TPS • • • • • • • • • • • • • • • • • 3.4.3.1 • • • • • • • 3.4.3.2 JTAG Master Eight I2C interfaces with master-slave and SMBus timeout support. All interfaces are SMBus 2.0 compliant.
Intel® Server Board S2400BB TPS 4. System Security 4.1 BIOS Password Protection The BIOS uses passwords to prevent unauthorized tampering with the server setup. Passwords can restrict entry to the BIOS Setup, restrict use of the Boot Popup menu, and suppress automatic USB device reordering. There is also an option to require a Power On password entry in order to boot the system.
Intel® Server Board S2400BB TPS 4.2 Trusted Platform Module (TPM) Support The Trusted Platform Module (TPM) option is a hardware-based security device that addresses the growing concern on boot process integrity and offers better data protection. TPM protects the system start-up process by ensuring it is tamper-free before releasing system control to the operating system. A TPM device provides secured storage to store data, such as security keys and passwords.
Intel® Server Board S2400BB TPS 4.2.3 TPM Security Setup Options The BIOS TPM Setup allows the operator to view the current TPM state and to carry out rudimentary TPM administrative operations. Performing TPM administrative options through the BIOS setup requires TPM physical presence verification. Using BIOS TPM Setup, the operator can turn ON or OFF TPM functionality and clear the TPM ownership contents. After the requested TPM BIOS Setup operation is carried out, the option reverts to No Operation.
Intel® Server Board S2400BB TPS Table 13. TSetup Utility – Security Configuration Screen Fields Setup Item TPM State* Options Enabled and Activated Enabled and Deactivated Disabled and Activated Disabled and Deactivated Help Text Comments Information only. Shows the current TPM device state. A disabled TPM device will not execute commands that use TPM functions and TPM security operations will not be available.
Intel® Server Board S2400BB TPS 5. Technology Support 5.1 Intel® Virtualization Technology – Intel® VT-x/VT-d/VT-c Intel® Virtualization Technology consists of three components which are integrated and interrelated, but which address different areas of Virtualization. • Intel® Virtualization Technology (VT-x) is processor-related and provides capabilities needed to provide a hardware assist to a Virtual Machine Monitor (VMM).
Intel® Server Board S2400BB TPS IT Challenge Capacity planning Detection and correction of hot spots Requirement • Ability to monitor actual power consumption to enable power usage modeling over time and a given planning period • Ability to understand cooling demand from a temperature and airflow perspective • Control capability that reduces platform power consumption to protect a server in a hot-spot • Ability to monitor server inlet temperatures to enable greater rack utilization in areas with adequate
Intel® Server Board S2400BB TPS 5.2.1 Hardware Requirements NM is supported only on platforms that have the NM FW functionality loaded and enabled on the Management Engine (ME) in the SSB and that have a BMC present to support the external LAN interface to the ME. NM power limiting features requires a means for the ME to monitor input power consumption for the platform.
Intel® Server Board S2400BB TPS 6. Platform Management Functional Overview Platform management functionality is supported by several hardware and software components integrated on the server board that work together to control system functions, monitor and report system health, and control various thermal and performance features. The purpose of platform management is to maintain (when possible) server functionality in the event of component failure and/or environmentally stressed conditions.
Intel® Server Board S2400BB TPS 6.1.2 Non IPMI Features The BMC supports the following non-IPMI features. • In-circuit BMC firmware update • BMC FW reliability enhancements: o Redundant BMC boot blocks to avoid possibility of a corrupted boot block resulting in a scenario that prevents a user from updating the BMC. o BMC System Management Health Monitoring • Fault resilient booting (FRB): FRB2 is supported by the watchdog timer functionality.
Intel® Server Board S2400BB TPS o Support for embedded web server UI in Basic Manageability feature set. o Human-readable SEL o Additional system configurability o Additional system monitoring capability o Enhanced on-line help • Integrated KVM • Integrated Remote Media Redirection • Local Directory Access Protocol (LDAP) support • Sensor and SEL logging additions/enhancements (e.g.
Intel® Server Board S2400BB TPS State S5 6.3 Supported Yes Description Soft off. The front panel buttons are not locked. The fans are stopped. The power-up process goes through the normal boot process. The power, reset, front panel NMI, and ID buttons are unlocked. Power Control Sources The server board supports several power control sources which can initiate a power-up or power-down activity. Table 15.
Intel® Server Board S2400BB TPS 6.5 Fault Resilient Booting (FRB) Fault resilient booting (FRB) is a set of BIOS and BMC algorithms and hardware support that allow a multiprocessor system to boot even if the bootstrap processor (BSP) fails. Only FRB2 is supported using watchdog timer commands. FRB2 refers to the FRB algorithm that detects system failures during POST. The BIOS uses the BMC watchdog timer to back up its operation during POST.
Intel® Server Board S2400BB TPS 6.8 System Event Log (SEL) The BMC implements the system event log as specified in the Intelligent Platform Management Interface Specification, Version 2.0. The SEL is accessible regardless of the system power state through the BMC's inband and out-of-band interfaces. The BMC allocates 65,502 bytes (approx 64 KB) of non-volatile storage space to store system events. The SEL timestamps may not be in order. Up to 3,639 SEL records can be stored at a time.
Intel® Server Board S2400BB TPS 6.9.2 Thermal Sensor Input to Fan Speed Control The BMC uses various IPMI sensors as input to the fan speed control. Some of the sensors are IPMI models of actual physical sensors whereas some are “virtual” sensors whose values are derived from physical sensors using calculations and/or tabular information.
Intel® Server Board S2400BB TPS 6.9.3 Memory Thermal Throttling The server board provides support for system thermal management through open loop throttling (OLTT) and closed loop throttling (CLTT) of system memory. Normal system operation uses closed-loop thermal throttling (CLTT) and DIMM temperature monitoring as major factors in overall thermal and acoustics management. In the event that BIOS is unable to configure the system for CLTT, it defaults to open-loop thermal throttling (OLTT).
Intel® Server Board S2400BB TPS Channel ID 0 1 2 3 4 5 6 7 8– 0Dh 0Eh 0Fh Notes: Interface Primary IPMB LAN 1 Supports Sessions No Yes LAN 2 1 LAN3 ® (Provided by the Intel Dedicated Server Management NIC) Reserved USB Secondary IPMB Yes Yes SMM Reserved 2 Self SMS/Receive Message Queue No – – No Yes No No 1. Optional hardware supported by the server system. 2. Refers to the actual channel used to send the request. 6.10.1 User Model The BMC supports the IPMI 2.0 user model.
Intel® Server Board S2400BB TPS 6.10.3.1 RMCP/ASF Messaging The BMC supports RMCP ping discovery in which the BMC responds with a pong message to an RMCP/ASF ping request. This is implemented per the Intelligent Platform Management Interface Specification Second Generation v2.0. 6.10.3.2 BMC LAN Channels The BMC supports three RMII/RGMII ports that can be used for communicating with Ethernet devices.
Intel® Server Board S2400BB TPS • • • • • NIC 3 MAC address = NIC 1 MAC address + 2 (for OS usage) NIC 4 MAC address = NIC 1 MAC address + 3 (for OS usage) BMC LAN channel 1 MAC address = NIC1 MAC address + 4 BMC LAN channel 2 MAC address = NIC1 MAC address + 5 BMC LAN channel 3 (RMM) MAC address = NIC1 MAC address + 6 The printed MAC address on the server board and/or server system is assigned to NIC1 on the server board.
Intel® Server Board S2400BB TPS 64, it would then generate for itself an IP of 1:2:3:4:215:17ff:fefe:2f62. The IP, Prefix, and Gateway are readonly parameters to the BMC user in this mode. IPv6 can be used with the BMC’s Web Console, JViewer (remote KVM and Media), and Systems Management Architecture for Server Hardware – Command Line Protocol (SMASH-CLP) interface (ssh). There is no standard yet on how IPMI RMCP or RMCP+ should operate over IPv6 so that is not currently supported. 6.10.3.
Intel® Server Board S2400BB TPS 6.10.3.5.2 Static LAN Configuration Parameters When the IP Address Configuration parameter is set to 01h (static), the following parameters may be changed by the user: LAN configuration parameter 3 (IP Address) LAN configuration parameter 6 (Subnet Mask) LAN configuration parameter 12 (Default Gateway Address) When changing from DHCP to Static configuration, the initial values of these three parameters will be equivalent to the existing DHCP-set parameters.
Intel® Server Board S2400BB TPS 6.10.3.6 DHCP BMC Hostname The BMC allows setting a DHCP Hostname using the Set/Get LAN Configuration Parameters command. DHCP Hostname can be set regardless of the IP Address source configured on the BMC. But this parameter is only used if the IP Address source is set to DHCP. When Byte 2 is set to “Update in progress”, all the 16 Block Data Bytes (Bytes 3 – 18) must be present in the request.
Intel® Server Board S2400BB TPS Parameter 21 (VLAN Priority) of the Set LAN Config Parameters IPMI command is now implemented and a range from 0-7 will be allowed for VLAN Priorities. Please note that bits 3 and 4 of Parameter 21 are considered Reserved bits. Parameter 25 (VLAN Destination Address) of the Set LAN Config Parameters IPMI command is not supported and returns a completion code of 0x80 (parameter not supported) for any read/write of parameter 25.
Intel® Server Board S2400BB TPS 6.10.9 Platform Event Filter (PEF) The BMC includes the ability to generate a selectable action, such as a system power-off or reset, when a match occurs to one of a configurable set of events. This capability is called Platform Event Filtering, or PEF. One of the available PEF actions is to trigger the BMC to send a LAN alert to one or more destinations. The BMC supports 20 PEF filters.
Intel® Server Board S2400BB TPS provides support for sending e-mail by means of SMTP, the Simple Mail Transport Protocol as defined in Internet RC 821. The e-mail alert provides a text string that describes a simple description of the event. SMTP alerting is configured using the embedded web server. 6.10.12 SM-CLP (SM-CLP Lite) SMASH refers to Systems Management Architecture for Server Hardware.
Intel® Server Board S2400BB TPS The GUI presented by the embedded web server authenticates the user before allowing a web session to be initiated. It presents all functions to all users but grays-out those functions that the user does not have privilege to execute. (e.g. if a user does not have privilege to power control, then the item shall be displayed in grey-out font in that user’s UI display).
Intel® Server Board S2400BB TPS For Reset via Virtual Front Panel, the restart cause will be because of “Chassis control” command. During Power action, Power button/Reset button should not accept the next action until current Power action is complete and the acknowledgment from BMC is received. EWS will provide a valid message during Power action until it completes the current Power action.
Intel® Server Board S2400BB TPS platform debug feature provides a means to capture this data for each installed power supply. The data can be analyzed by Intel for failure analysis and possibly provided to the power supply vendor as well. The BMC gets this data from the power supplies via PMBus manufacturerspecific commands. o Storage of system identification in power supply.
Intel® Server Board S2400BB TPS Table 18. Additional Diagnostics on Error. Category System Data 6.10.16 Data First 256 bytes of PCI config data for each PCI device PCI error registers MSR registers MCH registers Data Center Management Interface (DCMI) The DCMI Specification is an emerging standard that is targeted to provide a simplified management interface for Internet Portal Data Center (IPDC) customers. It is expected to become a requirement for server platforms which are targeted for IPDCs.
Intel® Server Board S2400BB TPS 7. Advanced Management Feature Support (RMM4) The integrated baseboard management controller has support for advanced management features which are enabled when an optional Intel® Remote Management Module 4 (RMM4) is installed. RMM4 is comprised of two boards – RMM4 lite and the optional Dedicated Server Management NIC (DMN).
Intel® Server Board S2400BB TPS Table 19. Enabling Advanced Management Features Manageability Hardware Benefits ® Comprehensive IPMI based base manageability features ® No dedicated NIC for management Enables KVM & media redirection via onboard NIC ® Dedicated NIC for management traffic. Higher bandwidth connectivity for KVM & media Redirection with 1Gbe NIC. Intel Integrated BMC Intel Remote Management Module 4 – Lite Package contains one module – 1- Key for advance Manageability features.
Intel® Server Board S2400BB TPS • 1650x1080 (WSXGA+) 7.1.1 Remote Console The Remote Console is the redirected screen, keyboard and mouse of the remote host system. To use the Remote Console window of your managed host system, the browser must include a Java* Runtime Environment plug-in. If the browser has no Java support, such as with a small handheld device, the user can maintain the remote host system using the administration forms displayed by the browser.
Intel® Server Board S2400BB TPS The media redirection feature is intended to allow system administrators or users to mount a remote IDE or USB CD-ROM, floppy drive, or a USB flash disk as a remote device to the server. Once mounted, the remote device appears just like a local device to the server, allowing system administrators or users to install software (including operating systems), copy files, update BIOS, and so on, or boot the server from this device.
Intel® Server Board S2400BB TPS 8. On-board Connector/Header Overview This section identifies the location and pin-out for on-board connectors and headers of the server board that provide an interface to system options/features, on-board platform management, or other user accessible options/features. 8.1 Power Connectors The server board includes several power connectors that are used to provide DC power to various devices. 8.1.
Intel® Server Board S2400BB TPS For server systems requiring support for redundant power, two connectors on the server board labeled “PDB_PWR” and “PDB_CTRL can be used to connect a separate power distribution board as illustrated in the following diagram. The following tables provide the pin-out for each connector. Table 21.
Intel® Server Board S2400BB TPS 8.1.2 Riser Card Power Connectors The server board includes two white 2x2-pin power connectors that provide supplemental power to high power PCIe x16 add-in cards (GPU) that have power requirements that exceed the 75W maximum power supplied by the PCIe x16 riser slot. A cable from this connector may be routed to a power connector on the given add-in card.
Intel® Server Board S2400BB TPS 8.2 Front Panel Headers and Connectors The server board includes several connectors that provide various possible front panel options. This section provides a functional description and pin-out for each connector. 8.2.
Intel® Server Board S2400BB TPS Table 27. Power/Sleep LED Functional States State Power Mode LED Description Power-off Power-on S5 Non-ACPI Non-ACPI ACPI Off On Off S4 ACPI Off S3-S1 ACPI Slow blink S0 ACPI Steady on System power is off, and the BIOS has not initialized the chipset. System power is on Mechanical is off, and the operating system has not saved any context to the hard disk. Mechanical is off. The operating system has saved context to the hard disk. DC power is still on.
Intel® Server Board S2400BB TPS 8.2.1.6 Hard Drive Activity LED Support The drive activity LED on the front panel indicates drive activity from the on-board hard disk controllers. The server board also provides a header giving access to this LED for add-in controllers. 8.2.1.7 System Status LED Support The System Status LED is a bi-color (Green/Amber) indicator that shows the current health of the server system.
Intel® Server Board S2400BB TPS Amber 8.2.2 Solid on Critical, nonrecoverable – System is halted Fatal alarm – system has failed or shutdown: CPU CATERR signal asserted MSID mismatch detected (CATERR also asserts for this case). CPU 1 is missing CPU Thermal Trip No power good – power fault DIMM failure when there is only 1 DIMM present and hence no good 1 memory present . Runtime memory uncorrectable error in non redundant mode.
Intel® Server Board S2400BB TPS 8.2.4 Intel® Local Control Panel Connector The server board includes a 7-pin connector that is used when the system is configured with the Intel® Local Control Panel with LCD support. On the server board this connector is labeled “LCP” and is located on the front edge of the board. The following table provides the pin-out for this connector. Table 32. Intel Local Control Panel Connector Pin-out ("LCP") 8.
Intel® Server Board S2400BB TPS Table 34.
Intel® Server Board S2400BB TPS 8.3.3 Internal Type-A USB Connector The server board includes one internal Type-A USB connector labeled “USB 2” and is located near the back edge of the board next to the Riser 1 slot. The following table provides the pin-out for this connector. Table 36. Internal Type-A USB Connector Pin-out ("USB 2") Signal Description P5V_USB_INT USB2_P2_F_DN USB2_P2_F_DP GROUND 8.3.
Intel® Server Board S2400BB TPS Table 38.
Intel® Server Board S2400BB TPS Table 40. Serial A Connector Pin-out Signal Description Pin# RTS DTR SOUT GROUND RI SIN DCD or DSR CTS 1 2 3 4 5 6 7** 8 ** Pin 7 of the RJ45 Serial A connector is configurable to support either a DSR (Default) signal or a DCD signal by switching jumper locations on the 3-pin jumper block labeled “SRL_A_CFG” on the server board which is located next to the stacked external USB connectors near the back edge of the board.
Intel® Server Board S2400BB TPS 9. Reset & Recovery Jumpers The server board includes several jumper blocks which are used to as part of a process to restore a board function back to a normal functional state. The following diagram and sections identify the location of each jumper block and provides a description of their use. Figure 30.
Intel® Server Board S2400BB TPS Serial Port ‘A’ Configuration Jumper – See section 8.5 9.1 BIOS Recovery Jumper When the BIOS Recovery jumper block is moved from its default pin position, the system will boot into a BIOS Recovery Mode. It is used when the system BIOS has become corrupted and is non-functional, requiring a new BIOS image to be loaded on to the server board. Note: The BIOS Recovery jumper is ONLY used to re-install a BIOS image in the event the BIOS has become corrupted.
Intel® Server Board S2400BB TPS 6. Boot to the EFI shell and update the ME firmware using the “MEComplete####.cap” file (where #### = ME revision number) using the following command: iflash32 /u /ni MEComplete####.cap 7. When update has successfully completed, power off system 8. Remove AC power cords 9. Move ME FRC UPD jumper back to the default position Note: If the ME FRC UPD jumper is moved with AC power applied, the ME will not operate properly.
Intel® Server Board S2400BB TPS 9.5 BMC Force Update Jumper Block The BMC Force Update jumper is used to put the BMC in Boot Recovery mode for a low-level update. It is used when the BMC has become corrupted and is non-functional, requiring a new BMC image to be loaded on to the server board. 1. Turn off the system and remove power cords 2. Move the BMC FRC UPDT Jumper from the default (pins 1 and 2) operating position to the Force Update position (pins 2 and 3) 3. Re-attach system power cords 4.
Intel® Server Board S2400BB TPS 10. Light Guided Diagnostics The server board includes several on-board LED indicators to aid troubleshooting various board level faults. The following diagram shows the location for each. Figure 31. On-Board Diagnostic LED Placement Revision 2.
Intel® Server Board S2400BB TPS Figure 32. Memory Slot Fault LED Locations 10.1 System ID LED The server board includes a blue system ID LED which is used to visually identify a specific server installed among many other similar servers. There are two options available for illuminating the System ID LED. 1. The front panel ID LED Button is pushed, which causes the LED to illuminate to a solid on state until the button is pushed again. 2.
Intel® Server Board S2400BB TPS Green ~1 Hz blink Degraded - system is operating in a degraded state although still functional, or system is operating in a redundant state but with an impending failure warning Amber ~1 Hz blink Non-critical System is operating in a degraded state with an impending failure warning, although still functioning Amber Solid on Critical, nonrecoverable – System is halted Revision 2.0 System degraded: Redundancy loss, such as power-supply or fan.
Intel® Server Board S2400BB TPS 10.3 BMC Boot/Reset Status LED Indicators During the BMC boot or BMC reset process, the System Status LED and System ID LED are used to indicate BMC boot process transitions and states. A BMC boot will occur when AC power is first applied to the system. A BMC reset will occur after: a BMC FW update, upon receiving a BMC cold reset command, and upon a BMC watchdog initiated reset. The following table defines the LED states during the BMC Boot/Reset process. Table 44.
Intel® Server Board S2400BB TPS 10.8 CPU Fault LEDs The server board includes a CPU fault LED for each CPU socket. The CPU Fault LED is lit if there is an MSID mismatch error is detected (i.e. CPU power rating is incompatible with the board). 10.9 System Power Good LED The Power Good LED is illuminated when system power is turned on and DC power to the server board is within acceptable limits. 10.
Intel® Server Board S2400BB TPS 11. Power Supply Specification Guidelines This section provides power supply specification guidelines recommended for providing the specified server platform with stable operating power requirements. Note: The power supply data provided in this section is for reference purposes only. It reflects Intel’s own DC power out requirements for a 750W power supply as used in an Intel designed 2U server platform.
Intel® Server Board S2400BB TPS 11.2 Power Supply DC Output Specification 11.2.1 Output Power / Currents The following tables define the minimum power and current ratings. The power supply must meet both static and dynamic voltage regulation requirements for all conditions. Table 46. Minimum Load Ratings 2, 3 Parameter Min Max. Peak 12V main 0.0 62.0 70.0 A 1 0.0 2.1 2.4 A 12Vstby Unit Notes:. 1) 12Vstby must provide 4.0A with two power supplies in parallel.
Intel® Server Board S2400BB TPS 11.2.4 Dynamic Loading The output voltages shall remain within limits specified for the step loading and capacitive loading specified in the table below. The load transient repetition rate shall be tested between 50Hz and 5kHz at duty cycles ranging from 10%-90%. The load transient repetition rate is only a test specification. The ∆ step load may occur anywhere within the MIN load to the MAX load conditions. Table 48.
Intel® Server Board S2400BB TPS 11.2.9 Common Mode Noise The Common Mode noise on any output shall not exceed 350mV pk-pk over the frequency band of 10Hz to 20MHz. 11.2.10 Soft Starting The Power Supply shall contain control circuit which provides monotonic soft start for its outputs without overstress of the AC line or any power supply components at any specified AC line or load conditions. 11.2.
Intel® Server Board S2400BB TPS 11.2.15 Timing Requirements These are the timing requirements for the power supply operation. The output voltages must rise from 10% to within regulation limits (Tvout_rise) within 5 to 70ms. For 12VSB, it is allowed to rise from 1.0 to 25ms. All outputs must rise monotonically. The following table shows the timing requirements for the power supply being turned on and off via the AC input, with PSON held low and the PSON signal, with the AC input applied. Table 51.
Intel® Server Board S2400BB TPS AC Input Tvout_holdup Vout Tpwok_low TAC_on_delay Tsb_on_delay Tpwok_on PWOK 12Vsb Tpwok_off Tsb_on_delay Tpwok_on Tpson_pwok Tpwok_holdup Tsb_vout Tpwok_off T5Vsb_holdup Tpson_on_delay PSON AC turn on/off cycle PSON turn on/off cycle Figure 33. Turn On/Off Timing (Power Supply Signals) Revision 2.
Intel® Server Board S2400BB TPS 12. BIOS Setup Utility The BIOS Setup utility is a text-based used to configure the system and view current settings and environment information for the platform devices. The Setup utility controls the platform's built-in devices, the boot manager, and error manager. The BIOS Setup interface consists of a number of pages or screens. Each page contains information or links to other pages. The advanced tab in Setup displays a list of general categories as links.
Intel® Server Board S2400BB TPS security option chosen and in effect by the password, a menu feature’s value may or may not be changed. If a value cannot be changed, its field is made inaccessible and appears grayed out. Table 52.
Intel® Server Board S2400BB TPS Appendix A: Integration and Usage Tips When adding or removing components or peripherals from the server board, power cords must be disconnected from the server. With power applied to the server, standby voltages are still present even though the server board is powered off. This server board supports Intel® Xeon® Processor E5-2400 product family or Intel® Xeon® Processor E5-2400 v2 product family with a Thermal Design Power (TDP) of up to and including 95 Watts.
Intel® Server Board S2400BB TPS Appendix B: Integrated BMC Sensor Tables This appendix provides BMC core sensor information common to all Intel server boards within this generation of product.. Specific server boards and/or server platforms may only implement a sub-set of sensors and/or may include additional sensors.
Intel® Server Board S2400BB TPS Rearm Sensors The rearm is a request for the event status for a sensor to be rechecked and updated upon a transition between good and bad states. Rearming the sensors can be done manually or automatically. This column indicates the type supported by the sensor. The following abbreviations are used to describe a sensor: - A: Auto-rearm - M: Manual rearm Default Hysteresis The hysteresis setting applies to all thresholds of the sensor.
Intel® Server Board S2400BB TPS Note: All sensors listed below may not be present on all platforms. Please check platform EPS section for platform applicability and platform chassis section for chassis specific sensors. Redundancy sensors will be only present on systems with appropriate hardware to support redundancy (for instance, fan or power supply) Table 53.
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Sensor Type Event / Reading Type Event Offset Triggers Assert / Deassert Readable Value / Offsets OK As – 04 - LAN leash lost OK As and De – 00 - Front panel NMI / diagnostic interrupt OK As Fatal 07 – Redundant: Transition from nonredundant state. Contrib.
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Voltage Regulator Watchdog (VR Watchdog) 0Bh All Note1 Fan Redundancy (Fan Redundancy) SSB Thermal Trip (SSB Therm Trip) IO Module Presence (IO Mod Presence) SAS Module Presence (SAS Mod Presence) BMC Firmware Health (BMC FW Health) Revision 2.
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) System Airflow (System Airflow) Baseboard Temperature 1 (Platform Specific) Front Panel Temperature (Front Panel Temp) SSB Temperature (SSB Temp) Baseboard Temperature 2 (Platform Specific) Baseboard Temperature 3 (Platform Specific) Baseboard Temperature 4 (Platform Specific) IO Module Temperature (I/O Mod Temp) PCI Riser 1 Temperature (PCI Riser 1 Temp) IO Riser Temperature (IO Riser Temp) Sensor # Platform Applicability 11h All 20
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Sensor Type Event / Reading Type 2Bh Chassisspecific Temperature Threshold 01h 01h Platformspecific Temperature Threshold 01h 01h Platformspecific Temperature Threshold 01h 01h Chassis & Platform Specific Temperature Threshold 01h 01h Temperature Threshold 01h 01h Hot-swap Backplane 3 Temperature (HSBP 3 Temp) PCI Riser 2 Temperature (PCI Riser 2 Temp) SAS Module Temperature (S
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Sensor Type Event / Reading Type Power Supply 1 AC Power Input 54h Chassisspecific Other Units Threshold 0Bh 01h Chassisspecific Other Units Threshold 0Bh 01h Chassisspecific Current Threshold 03h 01h Chassisspecific Current Threshold 03h 01h Chassisspecific Temperature Threshold 01h 01h (PS1 Power In) Power Supply 2 AC Power Input 55h (PS2 Power In) Power Supply 1 +12V % o
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Processor 1 Thermal Control % 78h All (P1 Therm Ctrl %) Processor 2 Thermal Control % 79h All (P2 Therm Ctrl %) Processor 1 ERR2 Timeout (P1 ERR2) Processor 2 ERR2 Timeout (P2 ERR2) Catastrophic Error (CATERR) Processor0 MSID Mismatch (P0 MSID Mismatch) Processor Population Fault (CPU Missing) Processor1 MSID Mismatch (P1 MSID Mismatch) Processor 1 VRD Temperature 7Ch 7Dh 80h 81h 82h 87h 90h
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Processor 1 Memory VRD Hot 2-3 (P1 Mem23 VRD Hot) 95h All Processor 2 Memory VRD Hot 0-1 (P2 Mem01 VRD Hot) 96h All Sensor Type Temperature 01h Temperature 01h Processor 2 Memory VRD Hot 2-3 (P2 Mem23 VRD Hot) 97h Power Supply 1 Fan Tachometer 1 (PS1 Fan Tach 1) A0h Chassisspecific Fan Power Supply 1 Fan Tachometer 2 (PS1 Fan Tach 2) A1h Chassisspecific Fan Power Supply 2 Fan Tachometer
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Sensor Type C9h Platform Specific Temperature Event / Reading Type Threshold 01h 01h CAh Platform Specific Temperature Threshold 01h 01h Event Offset Triggers Contrib.
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Baseboard +1.05V Processor 1 Vccp Sensor # D7h Platform Applicability All (BB +1.05Vccp P2) Baseboard +1.5V P1 Memory AB VDDQ D8h All (BB +1.5 P1MEM AB) Baseboard +1.5V P1 Memory CD VDDQ D9h All (BB +1.5 P1MEM CD) Baseboard +1.5V P2 Memory AB VDDQ DAh All (BB +1.5 P2MEM AB) Baseboard +1.5V P2 Memory CD VDDQ DBh All (BB +1.5 P2MEM CD) Baseboard +1.8V Aux (BB +1.8V AUX) Baseboard +1.1V Stand-by (BB +1.
Intel® Server Board S2400BB TPS Full Sensor Name (Sensor name in SDR) Baseboard +1.35V P2 Low Voltage Memory CD VDDQ Sensor # E7h Platform Applicability Sensor Type Event / Reading Type Event Offset Triggers Voltage 02h Threshold 01h [u,l] [c,nc] Platform Specific Voltage 02h Threshold 01h [u,l] [c,nc] Platform Specific Voltage 02h Threshold 01h [u,l] [c,nc] All (BB +1.35 P2LV CD) Baseboard +3.3V Riser 1 Power Good EAh (BB +3.3 RSR1 PGD) Baseboard +3.3V Riser 2 Power Good EBh (BB +3.
Intel® Server Board S2400BB TPS 112 Revision 2.
Intel® Server Board S2400BB TPS Appendix C: Management Engine Generated SEL Event Messages This appendix lists the OEM System Event Log message format of events generated by the Management Engine (ME). This includes the definition of event data bytes 10-16 of the Management Engine generated SEL records. For System Event Log format information, see the Intelligent Platform Management Interface Specification, Version 2.0. Table 54.
Intel® Server Board S2400BB TPS Table 55. Node Manager Health Event Node Manager Health Event Request Byte 1 - EvMRev =04h (IPMI2.
Intel® Server Board S2400BB TPS Appendix D: POST Code Diagnostic LED Decoder As an aid to assist in trouble shooting a system hang that occurs during a system’s Power-On Self Test (POST) process, the server board includes a bank of eight POST Code Diagnostic LEDs on the back edge of the server board.
Intel® Server Board S2400BB TPS Table 57. POST Progress Codes Diagnostic LED Decoder 1 = LED On, 0 = LED Off Lower Nibble Checkpoint Upper Nibble MSB LSB 8h 4h 2h 1h 8h 4h 2h 1h LED # #7 #6 #5 #4 #3 #2 #1 #0 Description SEC Phase 01h 0 0 0 0 0 0 0 1 First POST code after CPU reset 02h 0 0 0 0 0 0 1 0 Microcode load begin 03h 0 0 0 0 0 0 1 1 CRAM initialization begin 04h 0 0 0 0 0 1 0 0 Pei Cache When Disabled 05h 0 0 0 0 0 1 0 1 SEC Core At Power On Begin.
Intel® Server Board S2400BB TPS Diagnostic LED Decoder 1 = LED On, 0 = LED Off Lower Nibble Checkpoint Upper Nibble MSB LSB 8h 4h 2h 1h 8h 4h 2h 1h LED # #7 #6 #5 #4 #3 #2 #1 #0 Description A4h 1 0 1 0 0 1 0 0 DXE IDE enable A5h 1 0 1 0 0 1 0 1 DXE SCSI begin A6h 1 0 1 0 0 1 1 0 DXE SCSI reset A7h 1 0 1 0 0 1 1 1 DXE SCSI detect A8h 1 0 1 0 1 0 0 0 DXE SCSI enable A9h 1 0 1 0 1 0 0 1 DXE verifying SETUP password ABh 1 0 1 0 1 0 1 1 DXE SETUP start ACh 1 0 1 0 1 1 0 0 DXE SETUP input wait ADh 1 0 1 0 1 1 0 1
Intel® Server Board S2400BB TPS POST Memory Initialization MRC Diagnostic Codes There are two types of POST Diagnostic Codes displayed by the MRC during memory initialization; Progress Codes and Fatal Error Codes. The MRC Progress Codes are displays to the Diagnostic LEDs that show the execution point in the MRC operational path at each step. Table 58.
Intel® Server Board S2400BB TPS Table 59. MRC Fatal Error Codes Diagnostic LED Decoder 1 = LED On, 0 = LED Off Checkpoint Upper Nibble Lower Nibble Description MSB LED LSB 8h 4h 2h 1h 8h 4h 2h 1h #7 #6 #5 #4 #3 #2 #1 #0 MRC Fatal Error Codes E8h E9h 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 1 1 1 1 0 1 0 1 0 1 1 1 0 1 0 1 1 1 1 1 0 1 1 0 1 1 1 1 0 1 1 1 1 EAh EBh EDh EFh Revision 2.
Intel® Server Board S2400BB TPS Appendix E: POST Code Errors Most error conditions encountered during POST are reported using POST Error Codes. These codes represent specific failures, warnings, or are informational. POST Error Codes may be displayed in the Error Manager display screen, and are always logged to the System Event Log (SEL). Logged events are available to System Management applications, including Remote and Out of Band (OOB) management.
Intel® Server Board S2400BB TPS Table 60. POST Error Codes and Messages Error Code 0012 0048 0140 0141 0146 0191 0192 0194 0195 0196 0197 5220 5221 5224 8130 8131 8132 8133 8160 8161 8162 8163 8170 8171 8172 8173 8180 8181 8182 8183 8190 8198 8300 8305 83A0 83A1 84F2 84F3 84F4 84FF 8500 8501 8520 8521 8522 8523 8524 8525 8526 8527 8528 8529 852A 852B 852C 852D Revision 2.
Intel® Server Board S2400BB TPS Error Code 852E 852F 8530 8531 8532 8533 8534 8535 8536 8537 8538 8539 853A 853B 853C 853D 853E 853F (Go to 85C0) 8540 8541 8542 8543 8544 8545 8546 8547 8548 8549 854A 854B 854C 854D 854E 854F 8550 8551 8552 8553 8554 8555 8556 8557 8558 8559 855A 855B 855C 855D 855E 855F (Go to 85D0) 8560 8561 8562 8563 8564 8565 8566 8567 122 Error Message DIMM_E3 failed test/initialization DIMM_F1 failed test/initialization DIMM_F2 failed test/initialization DIMM_F3 failed test/initiali
Intel® Server Board S2400BB TPS Error Code 8568 8569 856A 856B 856C 856D 856E 856F 8570 8571 8572 8573 8574 8575 8576 8577 8578 8579 857A 857B 857C 857D 857E 857F (Go to 85E0) 85C0 85C1 85C2 85C3 85C4 85C5 85C6 85C7 85C8 85C9 85CA 85CB 85CC 85CD 85CE 85CF 85D0 85D1 85D2 85D3 85D4 85D5 85D6 85D7 85D8 85D9 85DA 85DB 85DC 85DD 85DE 85DF 85E0 85E1 85E2 85E3 Revision 2.
Intel® Server Board S2400BB TPS Error Code 85E4 85E5 85E6 85E7 85E8 85E9 85EA 85EB 85EC 85ED 85EE 85EF 8604 8605 8606 92A3 92A9 A000 A001 A002 A003 A100 A421 A5A0 A5A1 A6A0 Error Message DIMM_M1 encountered a Serial Presence Detection (SPD) failure DIMM_M2 encountered a Serial Presence Detection (SPD) failure DIMM_M3 encountered a Serial Presence Detection (SPD) failure DIMM_N1 encountered a Serial Presence Detection (SPD) failure DIMM_N2 encountered a Serial Presence Detection (SPD) failure DIMM_N3 encoun
Intel® Server Board S2400BB TPS Table 62. Integrated BMC Beep Codes Code 1-5-2-1 Reason for Beep No CPUs installed or first CPU socket is empty. Associated Sensors CPU1 socket is empty, or sockets are populated incorrectly CPU1 must be populated before CPU2. 1-5-2-4 MSID Mismatch 1-5-4-2 Power fault 1-5-4-4 1-5-1-2 Power control fault (power good assertion timeout).
Intel® Server Board S2400BB TPS Appendix F: Supported Intel® Server Systems Two Intel® Server System product families integrate the Intel® Server board S2400BB, they are the 1U rack mount Intel® Server System R1000BB product family and the 2U rack mount Intel® R2000BB product family. ® Figure 35. Intel Server System R1000BB 126 Revision 2.
Intel® Server Board S2400BB TPS ® Table 63.
Intel® Server Board S2400BB TPS Power Supply Options The server system can have up to two power supply modules installed, providing support for the following power configurations: 1+0, 1+1 Redundant Power, and 2+0 Combined Power Three power supply options: o AC 460W Gold o AC 750W Platinum o DC 750W Storage Bay Options 4x – 3.5” SATA/SAS Hot Swap Hard Drive Bays + Optical Drive support 8x – 2.
Intel® Server Board S2400BB TPS ® Figure 36. Intel Server System R2000BB Revision 2.
Intel® Server Board S2400BB TPS ® Table 64.
Intel® Server Board S2400BB TPS Power Supply Options Storage Bay Options Supported Rack Mount Kit Accessory Options The server system can have up to two power supply modules installed, providing support for the following power configurations: 1+0, 1+1 Redundant Power, and 2+0 Combined Power. • AC 460W Gold • AC 750W Platinum • DC 750W • • • • • 8x – 3.5” SATA/SAS Hot Swap Hard Drive Bays + Optical Drive support 12x – 3.5” SATA/SAS Hot Swap Hard Drive Bays 8x – 2.
Intel® Server Board S2400BB TPS Glossary This appendix contains important terms used in this document. For ease of use, numeric entries are listed first (e.g., “82460GX”) followed by alpha entries (e.g., “AGP 4x”). Acronyms are followed by nonacronyms.
Intel® Server Board S2400BB TPS Term IERR Internal Error IFB I/O and Firmware Bridge ILM Independent Loading Mechanism IMC Integrated Memory Controller INTR Interrupt I/OAT I/O Acceleration Technology IOH I/O Hub IP Internet Protocol IPMB Intelligent Platform Management Bus IPMI Intelligent Platform Management Interface IR Infrared ITP In-Target Probe KB 1024 bytes KCS Keyboard Controller Style KVM Keyboard, Video, Mouse LAN Local Area Network LCD Liquid Crystal Display LDA
Intel® Server Board S2400BB TPS 134 Term RMII Reduced Media-Independent Interface Definition ROM Read Only Memory RTC Real-Time Clock (Component of ICH peripheral chip on the server board) SDR Sensor Data Record SECC Single Edge Connector Cartridge SEEPROM Serial Electrically Erasable Programmable Read-Only Memory SEL System Event Log SIO Server Input/Output SMBUS System Management BUS SMI Server Management Interrupt (SMI is the highest priority non-maskable interrupt) SMM Server Man
Intel® Server Board S2400BB TPS Reference Documents • Advanced Configuration and Power Interface Specification, Revision 3.0, http://www.acpi.info/. • Intelligent Platform Management Bus Communications Protocol Specification, Version 1.0. 1998. Intel Corporation, Hewlett-Packard Company, NEC Corporation, Dell Computer Corporation. • Intelligent Platform Management Interface Specification, Version 2.0. 2004. Intel Corporation, Hewlett-Packard Company, NEC Corporation, Dell Computer Corporation.
