Intel Server Board S2400BB

Intel® Server Board S2400BB TPS
Revision 2.0
16
Table 6. LRDIMM Support Guidelines Intel
®
Xeon
®
Processor E5-2400 v2 Product Family
Ranks Per DIMM &
Data Width
Memory Capacity
Per DIMM
Speed (MT/s) and Voltage Validated by
Slot per Channel (SPC) and DIMM Per
Channel (DPC)
1 DIMM / Channel
2 DIMMs / Channel
1.35V
1.5V
1.35V
1.5V
QRx4
(DDP)
16GB 32GB 1066, 1333
1066,
1333
1066 1066
8Rx4
(QDP)
32GB 64GB 1066 1066 1066 1066
3.2.2.2 Memory Slot Identification and Population Rules
Note: Although mixed DIMM configurations may be functional, Intel only performs platform validation on
systems that are configured with identical DIMMs installed.
Each installed processor provides three channels of memory. On the Intel
®
Server Board S2400BB each
memory channel supports 2 memory slots, for a total possible 12 DIMMs installed.
System memory is organized into physical slots on DDR3 memory channels that belong to processor
sockets.
The memory channels from processor socket 1 are identified as Channel A, B, and C. The memory
channels from processor socket 2 are identified as Channel D, E, and F.
Each memory slot on the server board is identified by channel and slot number within that channel. For
example, DIMM_A1 is the first slot on Channel A on processor 1; DIMM_D1 is the first DIMM socket on
Channel D on processor 2.
The memory slots associated with a given processor are unavailable if the corresponding processor
socket is not populated.
A processor may be installed without populating the associated memory slots provided a second
processor is installed with associated memory.
In this case, the memory is shared by the processors.
However, the platform suffers performance degradation and latency due to the remote memory.
Processor sockets are self-contained and autonomous. However, all memory subsystem support (such
as Memory RAS, Error Management,) in the BIOS setup are applied commonly across processor
sockets.
The BLUE memory slots on the server board identify the first memory slot for a given memory channel.
DIMM population rules require that DIMMs within a channel be populated starting with the BLUE DIMM slot or
DIMM farthest from the processor in a “fill-farthest” approach. In addition, when populating a Quad-rank DIMM
with a Single- or Dual-rank DIMM in the same channel, the Quad-rank DIMM must be populated farthest from
the processor.
On the Intel
®
Server Board S2600BB, a total of 12 DIMM slots is provided (2 CPUs 3 Channels / CPU, 2
DIMMs / Channel). The nomenclature for memory slots is detailed in the following table:
Table 7. Intel
®
Server Board S2400BB Memory Slot Identification
Processor Socket 2
Processor Socket 1
(0)
Channel D
(1)
Channel E
(2)
Channel F
(0)
Channel A
(1)
Channel B
(2)
Channel C
D1
D2
E1
E2
F1
F2
A1
A2
B1
B2
C1
C2