Personal Computer User Manual

Intel® PXA27x Processor Family Power Requirements
6 Application Note
The terms run mode and normal mode are used interchangeably, although normal mode comprises
both the run-mode and turbo-mode settings.
2.0 Intel® PXA27x Processor Power Supply Domains
Viewed externally, the main or backup battery powers ten power-supply domains. Additional
supply domains are present internally, but power for these is derived from the external supply
inputs.
All functional units within a power domain connect to the same power supply and are powered up
and down together. The PXA27x processor architecture, with its multiple power-supply domains,
provides flexibility in system configuration (including selection of I/O voltages for different
memory and peripherals) and efficient power management (for instance, flexibility in selecting
which peripherals are powered at the same time). Together, these let system designers make power/
complexity trade-offs and optimize a product for intended markets.
Product designers can also choose to strap certain supplies together (to power several domains
from a common regulator) to reduce complexity, cost, and the number of regulators in the system.
Guidelines showing which supplies can be combined are provided in this document.
A summary of the voltage and tolerance requirements for each external supply input is shown in
Table 1. Figure 1 shows the PXA27x processor internal and external power domains and their
connections.
Table 1. External Power Supply Descriptions
Power Domain Enable
1
Units
Specified Levels
(Volts)
Tolerance
(%)
VCC_BATT None
Sleep-control subsystem, oscillators and
real-time clock
3.0 ± 25
VCC_IO SYS_EN Peripheral input/output 3.0, 3.3
±10 (@ 3.0 V
=10%, -10.3%)
VCC_LCD SYS_EN LCD input/output 1.8, 2.5, 3.0, 3.3
+20,-5 (@ 1.8 V)
otherwise ±10
VCC_MEM SYS_EN Memory controller input/output 1.8, 2.5, 3.0, 3.3
+20,-5 (@ 1.8 V)
otherwise ±10
VCC_BB SYS_EN Baseband interface 1.8, 2.5, 3.0, 3.3
+20,-5 (@ 1.8 V)
otherwise ±10
VCC_USIM SYS_EN USIM interface 1.8, 3.0
+20,-5 (@ 1.8 V)
otherwise ±10
VCC_USB SYS_EN Differential USB input/output 3.0, 3.3 ±10
VCC_PLL PWR_EN Phase-locked loops 1.3 ±10
VCC_SRAM PWR_EN Internal SRAM units 1.1 ±10
VCC_CORE PWR_EN CPU and other internal units variable 0.85 – 1.55
1
-5 +10
NOTE: SYS_EN and PWR_EN are PXA27x processor output control signals.
1. PXA27x processors have different maximum frequencies and VCC_CORE voltages. Refer to both of the
Intel® PXA27x
Processor Family EMTSs for details.