Personal Computer User Manual
Application Note iii
Intel® PXA27x Processor Family Power Requirements
Contents
Contents
1.0 Introduction....................................................................................................................................5
1.1 Naming Conventions ............................................................................................................5
2.0 Intel® PXA27x Processor Power Supply Domains.....................................................................5
2.1 Power Domains and System Voltage/Current Requirements...............................................8
2.1.1 Intel® PXA27x Processor Power Supplies ..............................................................8
2.1.2 Power Supply Configuration in a Minimal System .................................................10
2.1.3 Intel® PXA27x Processor Supply Current for Each Power Domain ......................11
2.1.4 Intel® PXA27x Processor VCC_CORE Supply Current ........................................12
2.1.5 Default Reset Values .............................................................................................13
2.2 Batteries..............................................................................................................................14
2.2.1 Main Battery...........................................................................................................14
2.2.2 Backup Battery ......................................................................................................14
2.2.3 Battery Chargers and Main Power.........................................................................15
3.0 Intel® PXA27x Processor Low Power Operating Modes .........................................................17
4.0 Power Controller Interface Signals............................................................................................18
4.1 Power Enable (PWR_EN)...................................................................................................19
4.2 System Power Enable (SYS_EN) / GPIO<2>.....................................................................19
4.3 Power Manager I2C Clock (PWR_SCL) / GPIO<3>...........................................................19
4.4 Power Manager I2C Data (PWR_SDA) / GPIO<4>)...........................................................20
4.5 System-Level Considerations for I2C .................................................................................20
4.6 On, Off, and RESET ...........................................................................................................20
4.6.1 On and Off Control.................................................................................................20
4.6.2 User-Initiated Hard Reset Input .............................................................................20
4.6.3 nRESET Output from PMIC to the Intel® PXA27x Processor ...............................21
4.7 Universal Subscriber Identity Module (USIM).....................................................................21
4.8 Power Manager Capacitor Signals .....................................................................................21
5.0 Power Mode Sequencing ............................................................................................................22
5.1 Power-On............................................................................................................................22
5.1.1 Cold-Start Power-On and Hardware Reset............................................................22
5.1.2 Initial Power Up and Deep Sleep Exit Sequence...................................................23
5.1.3 Hardware Reset Behavior......................................................................................24
5.2 Sleep and Deep Sleep........................................................................................................27
5.2.1 Sleep Entry and Exit ..............................................................................................27
5.2.2 Deep Sleep Entry and Exit.....................................................................................28
6.0 Dynamic Voltage Management (DVM) .......................................................................................29
6.1 VCC_CORE Regulator and Dynamic Voltage Management ..............................................29
6.2 Intel® PXA27x Processor Voltage Manager.......................................................................30
6.3 Power Manager I2C Interface.............................................................................................31
6.4 DVM Sequencing................................................................................................................31
7.0 Fault Management .......................................................................................................................31
7.1 nVDD_FAULT..................................................................................................................... 31