Personal Computer User Manual
Intel® PXA27x Processor Family Power Requirements
12 Application Note
Note: The figures in Table 4 where taken from a system with no enhanced power management
optimization such as Intel Wireless Speedstep (which allows control over the PXA27x processors
low power modes and dynamically selectable frequency and voltage change capability).
Table 4. Intel® PXA27x Processor VCC_CORE Supply Current
Note: Use these specifications as a guideline for power supply capacity. These typical guidelines will
vary across different platforms and software applications.
2.1.3.2 Supply Current For Each Power Domain
This section provides guidelines for the power consumption that could be seen for each power
supply domain when running a heavily loaded system. Focused workloads were used to exercise
each power supply domain separately. It is important to note that the workloads were designed to
push the power consumption on each domain to a higher than normal level given a typical
environment in order to show what the overall power envelope for these domains could look like.
In a real system, each domain will see varying amounts of power consumption based on the type of
workload run. For instance, an MPEG-4 decoder is going to utilize the memory controller much
more than performing simple email transactions would.
Guidance on the power consumption for each domain in order to show Table 5 lists power-supply
current for each PXA27x processor power domain except for VCC_CORE (Table 4 shows data for
VCC_CORE). The environment test conditions are at room temperature and the voltage levels are
specified below.
Note that the I/O domain regulator(s) (VCC_IO, VCC_LCD, VCC_MEM, VCC_BB,
VCC_USIM, VCC_USB) have additional loading from external devices attached to the PXA27x
processor. For example, when flash memory or SDRAM is connected to the system bus. These
loads must be added to those of PXA27x processor I/Os (if they are powered by the same
regulator) when specifying the total load to be provided by a given regulator.
Frequency
Point @
voltage V
Dhrystones 2.1
Current (mA)
Power
(mW)
MPEG4 Decode
current (mA)
Power
(mW)
Power Stress
Test
Current (mA)
Power
(mW)
624 MHz
1.55 V
658 1019 622 964 1006 1559
520 Mhz
1.45V
503 729 475 689 767 1112
416 MHz
1.35V
395 533 420 567 594 802
312 MHz
1.25V
297 371 333 416 436 545
208 MHz
1.15V
208 239 263 303 295 339
NOTE: Core Frequency shown above/Internal bus = 208MHz/Memclk = 208MHz/SDCLK = 104MHz